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Message-ID: <20251106194340.4e8aa79a.zhiw@nvidia.com>
Date: Thu, 6 Nov 2025 19:43:40 +0200
From: Zhi Wang <zhiw@...dia.com>
To: Danilo Krummrich <dakr@...nel.org>
CC: <rust-for-linux@...r.kernel.org>, <linux-pci@...r.kernel.org>,
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Subject: Re: [PATCH v5 6/7] rust: pci: add config space read/write support
On Thu, 6 Nov 2025 17:30:39 +0100
Danilo Krummrich <dakr@...nel.org> wrote:
> > impl Device<device::Core> {
> > @@ -441,6 +480,20 @@ pub fn set_master(&self) {
> > // SAFETY: `self.as_raw` is guaranteed to be a pointer to
> > a valid `struct pci_dev`. unsafe {
> > bindings::pci_set_master(self.as_raw()) }; }
> > +
> > + /// Return an initialized config space object.
> > + pub fn config_space<'a>(
> > + &'a self,
> > + ) -> Result<ConfigSpace<'a, { ConfigSpaceSize::Normal.as_raw()
> > }>> {
> > + Ok(ConfigSpace { pdev: self })
> > + }
> > +
> > + /// Return an initialized config space object.
> > + pub fn config_space_exteneded<'a>(
> > + &'a self,
> > + ) -> Result<ConfigSpace<'a, {
> > ConfigSpaceSize::Extended.as_raw() }>> {
> > + Ok(ConfigSpace { pdev: self })
> > + }
> > }
>
> Please implement them for Device<Bound> rather than Device<Core>.
> Also, the methods seem to be infallible, hence no need to return a
> Result.
>
Oops, I missed this one during the rebase. Will fix it in the next
spin. Thanks for catching this.
> > +/// Represents the PCI configuration space of a device.
> > +///
> > +/// Provides typed read and write accessors for configuration
> > registers +/// using the standard `pci_read_config_*` and
> > `pci_write_config_*` helpers. +///
> > +/// The generic const parameter `SIZE` can be used to indicate the
> > +/// maximum size of the configuration space (e.g. 256 bytes for
> > legacy, +/// 4096 bytes for extended config space). The actual size
> > is obtained +/// from the underlying `struct pci_dev` via
> > [`Device::cfg_size`]. +pub struct ConfigSpace<'a, const SIZE: usize
> > = { ConfigSpaceSize::Extended as usize }> {
> > + pub(crate) pdev: &'a Device<device::Core>,
>
> /Core/Bound/
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