linux-kernel - Re: [PATCH] KVM: SVM: Ensure SPEC_CTRL[63:32] is context switched between guest and host

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Message-ID: <CAFULd4Z=PKeyzaER51CE7Zm4a-yeiru=HcBFx8E4J5hx3io=Tw@mail.gmail.com>
Date: Thu, 6 Nov 2025 19:21:35 +0100
From: Uros Bizjak <ubizjak@...il.com>
To: Sean Christopherson <seanjc@...gle.com>
Cc: Paolo Bonzini <pbonzini@...hat.com>, kvm@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] KVM: SVM: Ensure SPEC_CTRL[63:32] is context switched
 between guest and host

On Thu, Nov 6, 2025 at 2:13 AM Sean Christopherson <seanjc@...gle.com> wrote:
>
> From: Uros Bizjak <ubizjak@...il.com>
>
> SPEC_CTRL is an MSR, i.e. a 64-bit value, but the VMRUN assembly code
> assumes bits 63:32 are always zero.  The bug is _currently_ benign because
> neither KVM nor the kernel support setting any of bits 63:32, but it's
> still a bug that needs to be fixed.
>
> Signed-off-by: Uros Bizjak <ubizjak@...il.com>
> Suggested-by: Sean Christopherson <seanjc@...gle.com>
> Co-developed-by: Sean Christopherson <seanjc@...gle.com>
> Signed-off-by: Sean Christopherson <seanjc@...gle.com>
> ---
>  arch/x86/kvm/svm/vmenter.S | 44 +++++++++++++++++++++++++++++++-------
>  1 file changed, 36 insertions(+), 8 deletions(-)
>
> diff --git a/arch/x86/kvm/svm/vmenter.S b/arch/x86/kvm/svm/vmenter.S
> index 235c4af6b692..53f45f5b611f 100644
> --- a/arch/x86/kvm/svm/vmenter.S
> +++ b/arch/x86/kvm/svm/vmenter.S
> @@ -52,11 +52,23 @@
>          * there must not be any returns or indirect branches between this code
>          * and vmentry.
>          */
> -       movl SVM_spec_ctrl(%_ASM_DI), %eax
> -       cmp PER_CPU_VAR(x86_spec_ctrl_current), %eax
> +#ifdef CONFIG_X86_64
> +       mov SVM_spec_ctrl(%rdi), %rdx
> +       cmp PER_CPU_VAR(x86_spec_ctrl_current), %rdx
>         je 801b
> +       movl %edx, %eax
> +       shr $32, %rdx
> +#else
> +       mov SVM_spec_ctrl(%edi), %eax
> +       mov PER_CPU_VAR(x86_spec_ctrl_current), %ecx
> +       xor %eax, %ecx
> +       mov SVM_spec_ctrl + 4(%edi), %edx
> +       mov PER_CPU_VAR(x86_spec_ctrl_current + 4), %esi
> +       xor %edx, %esi
> +       or %esi, %ecx
> +       je 801b
> +#endif
>         mov $MSR_IA32_SPEC_CTRL, %ecx
> -       xor %edx, %edx
>         wrmsr
>         jmp 801b
>  .endm
> @@ -81,13 +93,26 @@
>         jnz 998f
>         rdmsr
>         movl %eax, SVM_spec_ctrl(%_ASM_DI)
> +       movl %edx, SVM_spec_ctrl + 4(%_ASM_DI)
>  998:
> -
>         /* Now restore the host value of the MSR if different from the guest's.  */
> -       movl PER_CPU_VAR(x86_spec_ctrl_current), %eax
> -       cmp SVM_spec_ctrl(%_ASM_DI), %eax
> +#ifdef CONFIG_X86_64
> +       mov SVM_spec_ctrl(%rdi), %rdx
> +       cmp PER_CPU_VAR(x86_spec_ctrl_current), %rdx
>         je 901b
> -       xor %edx, %edx
> +       mov PER_CPU_VAR(x86_spec_ctrl_current), %rdx
> +       movl %edx, %eax
> +       shr $32, %rdx

The above code can be written as:

mov PER_CPU_VAR(x86_spec_ctrl_current), %rdx
cmp SVM_spec_ctrl(%rdi), %rdx
je 901b
movl %edx, %eax
shr $32, %rdx

The improved code will save a memory read from x86_spec_ctrl_current.

> +#else
> +       mov SVM_spec_ctrl(%edi), %esi
> +       mov PER_CPU_VAR(x86_spec_ctrl_current), %eax

Can the above two instructions be swapped, just to be consistent with
x86_64 code?

> +       xor %eax, %esi

> +       mov SVM_spec_ctrl + 4(%edi), %edi
> +       mov PER_CPU_VAR(x86_spec_ctrl_current + 4), %edx

... and the above two insns.

Uros.