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Message-ID: <20251106183643.1963801-1-helgaas@kernel.org>
Date: Thu,  6 Nov 2025 12:36:37 -0600
From: Bjorn Helgaas <helgaas@...nel.org>
To: linux-pci@...r.kernel.org
Cc: Christian Zigotzky <chzigotzky@...osoft.de>,
	Manivannan Sadhasivam <mani@...nel.org>,
	mad skateman <madskateman@...il.com>,
	"R . T . Dickinson" <rtd2@...a.co.nz>,
	Darren Stevens <darren@...vens-zone.net>,
	John Paul Adrian Glaubitz <glaubitz@...sik.fu-berlin.de>,
	Lukas Wunner <lukas@...ner.de>,
	luigi burdo <intermediadc@...mail.com>,
	Al <al@...azap.net>,
	Roland <rol7and@....com>,
	Hongxing Zhu <hongxing.zhu@....com>,
	hypexed@...oo.com.au,
	linuxppc-dev@...ts.ozlabs.org,
	debian-powerpc@...ts.debian.org,
	linux-kernel@...r.kernel.org,
	Bjorn Helgaas <bhelgaas@...gle.com>
Subject: [PATCH 0/2] PCI/ASPM: Allow quirks to avoid L0s and L1

From: Bjorn Helgaas <bhelgaas@...gle.com>

We enabled ASPM too aggressively in v6.18-rc1.  f3ac2ff14834 ("PCI/ASPM:
Enable all ClockPM and ASPM states for devicetree platforms") enabled ASPM
L0s, L1, and (if advertised) L1 PM Substates.

L1 PM Substates and Clock PM in particular are a problem because they
depend on CLKREQ# and sometimes device-specific configuration, and none of
this is discoverable in a generic way.

df5192d9bb0e ("PCI/ASPM: Enable only L0s and L1 for devicetree platforms")
(v6.18-rc3) backed off and omitted Clock PM and L1 Substates.

L0s and L1 are generically discoverable, but some devices advertise them
even though they don't work correctly.  This series is a way to avoid L0s
and L1 in that case.

Bjorn Helgaas (2):
  PCI/ASPM: Cache Link Capabilities so quirks can override them
  PCI/ASPM: Avoid L0s and L1 on Freescale Root Ports

 drivers/pci/pcie/aspm.c | 42 ++++++++++++++++++++---------------------
 drivers/pci/probe.c     |  5 ++---
 drivers/pci/quirks.c    | 12 ++++++++++++
 include/linux/pci.h     |  1 +
 4 files changed, 36 insertions(+), 24 deletions(-)

-- 
2.43.0


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