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Message-ID: <BN9PR11MB52766F70E2D8FD19C154CE958CC2A@BN9PR11MB5276.namprd11.prod.outlook.com>
Date: Thu, 6 Nov 2025 08:20:36 +0000
From: "Tian, Kevin" <kevin.tian@...el.com>
To: "Winiarski, Michal" <michal.winiarski@...el.com>, Alex Williamson
<alex@...zbot.org>, "De Marchi, Lucas" <lucas.demarchi@...el.com>,
Thomas Hellström <thomas.hellstrom@...ux.intel.com>,
"Vivi, Rodrigo" <rodrigo.vivi@...el.com>, Jason Gunthorpe <jgg@...pe.ca>,
Yishai Hadas <yishaih@...dia.com>, Shameer Kolothum
<skolothumtho@...dia.com>, "intel-xe@...ts.freedesktop.org"
<intel-xe@...ts.freedesktop.org>, "linux-kernel@...r.kernel.org"
<linux-kernel@...r.kernel.org>, "kvm@...r.kernel.org" <kvm@...r.kernel.org>,
"Brost, Matthew" <matthew.brost@...el.com>, "Wajdeczko, Michal"
<Michal.Wajdeczko@...el.com>
CC: "dri-devel@...ts.freedesktop.org" <dri-devel@...ts.freedesktop.org>, "Jani
Nikula" <jani.nikula@...ux.intel.com>, Joonas Lahtinen
<joonas.lahtinen@...ux.intel.com>, Tvrtko Ursulin <tursulin@...ulin.net>,
David Airlie <airlied@...il.com>, Simona Vetter <simona@...ll.ch>, "Laguna,
Lukasz" <lukasz.laguna@...el.com>, Christoph Hellwig <hch@...radead.org>
Subject: RE: [PATCH v4 28/28] vfio/xe: Add device specific vfio_pci driver
variant for Intel graphics
> From: Winiarski, Michal <michal.winiarski@...el.com>
> Sent: Wednesday, November 5, 2025 11:10 PM
>
> In addition to generic VFIO PCI functionality, the driver implements
> VFIO migration uAPI, allowing userspace to enable migration for Intel
> Graphics SR-IOV Virtual Functions.
> The driver binds to VF device, and uses API exposed by Xe driver bound
> to PF device to control VF device state and transfer the migration data.
"The driver binds to VF device and uses API exposed by Xe driver to
transfer the VF migration data under the control of PF device."
> +config XE_VFIO_PCI
> + tristate "VFIO support for Intel Graphics"
> + depends on DRM_XE
> + select VFIO_PCI_CORE
> + help
> + This option enables vendor-specific VFIO driver for Intel Graphics.
> + In addition to generic VFIO PCI functionality, it implements VFIO
> + migration uAPI allowing userspace to enable migration for
> + Intel Graphics SR-IOV Virtual Functions supported by the Xe driver.
hmm another "vendor-specific"...
> +struct xe_vfio_pci_core_device {
> + struct vfio_pci_core_device core_device;
> + struct xe_device *xe;
> + /* VF number used by PF, Xe HW/FW components use vfid indexing
> starting from 1 */
Having both PF and Xe HW/FW is a bit noising. could be:
/* PF internal control uses vfid index starting from 1 */
> +
> +static void xe_vfio_pci_state_mutex_lock(struct xe_vfio_pci_core_device
> *xe_vdev)
> +{
> + mutex_lock(&xe_vdev->state_mutex);
> +}
> +
> +/*
> + * This function is called in all state_mutex unlock cases to
> + * handle a 'deferred_reset' if exists.
> + */
> +static void xe_vfio_pci_state_mutex_unlock(struct xe_vfio_pci_core_device
> *xe_vdev)
> +{
> +again:
> + spin_lock(&xe_vdev->reset_lock);
> + if (xe_vdev->deferred_reset) {
> + xe_vdev->deferred_reset = false;
> + spin_unlock(&xe_vdev->reset_lock);
> + xe_vfio_pci_reset(xe_vdev);
> + goto again;
> + }
> + mutex_unlock(&xe_vdev->state_mutex);
> + spin_unlock(&xe_vdev->reset_lock);
> +}
this deferred_reset logic is a mlx unique thing. See:
https://lore.kernel.org/kvm/20240220132459.GM13330@nvidia.com/
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