linux-kernel - [PATCH v2 0/3] bus: rifsc: add stm32mp21 support and config dump debug entry

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Message-ID: <20251106-rifsc_debugfs-v2-0-f90e94ae756d@foss.st.com>
Date: Thu, 6 Nov 2025 10:31:47 +0100
From: Gatien Chevallier <gatien.chevallier@...s.st.com>
To: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Maxime Coquelin
	<mcoquelin.stm32@...il.com>,
        Alexandre Torgue <alexandre.torgue@...s.st.com>
CC: <devicetree@...r.kernel.org>, <linux-stm32@...md-mailman.stormreply.com>,
        <linux-arm-kernel@...ts.infradead.org>, <linux-kernel@...r.kernel.org>,
        Gatien Chevallier <gatien.chevallier@...s.st.com>,
        Conor Dooley
	<conor.dooley@...rochip.com>
Subject: [PATCH v2 0/3] bus: rifsc: add stm32mp21 support and config dump
 debug entry

The STM32MP21x platforms have a slightly different RIFSC. Add support
for these platforms.

Also, the RIF is a complex firewall framework which can be tricky
to debug. To facilitate the latter, add a debugfs entry that can
be used to display the whole RIFSC firewall configuration at runtime.

Signed-off-by: Gatien Chevallier <gatien.chevallier@...s.st.com>
---
Changes in v2:
- Added Conor tag on bindings
- Fixed coccinelle warning by using str_enabled_disabled() when
  applicable
- Link to v1: https://lore.kernel.org/r/20251104-rifsc_debugfs-v1-0-7ebdfbf8d33f@foss.st.com

---
Gatien Chevallier (3):
      dt-bindings: bus: add stm32mp21 RIFSC compatible
      arm64: dts: st: set RIFSC as an access controller on stm32mp21x platforms
      bus: rifsc: add debugfs entry to dump the firewall configuration

 .../bindings/bus/st,stm32mp25-rifsc.yaml           |   8 +-
 arch/arm64/boot/dts/st/stm32mp211.dtsi             |   4 +-
 drivers/bus/stm32_rifsc.c                          | 597 ++++++++++++++++++++-
 3 files changed, 602 insertions(+), 7 deletions(-)
---
base-commit: 6146a0f1dfae5d37442a9ddcba012add260bceb0
change-id: 20251104-rifsc_debugfs-5053ea033ce3

Best regards,
-- 
Gatien Chevallier <gatien.chevallier@...s.st.com>