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Message-ID: <3d960043.c46.19a589e8637.Coremail.zhangsenchuan@eswincomputing.com>
Date: Thu, 6 Nov 2025 18:02:55 +0800 (GMT+08:00)
From: zhangsenchuan <zhangsenchuan@...incomputing.com>
To: "Manivannan Sadhasivam" <manivannan.sadhasivam@....qualcomm.com>
Cc: lpieralisi@...nel.org, kwilczynski@...nel.org, mani@...nel.org,
	bhelgaas@...gle.com, will@...nel.org, linux-pci@...r.kernel.org,
	linux-kernel@...r.kernel.org, robh@...nel.org,
	linux-arm-msm@...r.kernel.org
Subject: Re: [PATCH 3/3] PCI: dwc: Skip PME_Turn_Off and L2/L3 transition if
 no device is available




> -----Original Messages-----
> From: "Manivannan Sadhasivam" <manivannan.sadhasivam@....qualcomm.com>
> Send time:Thursday, 06/11/2025 14:13:26
> To: lpieralisi@...nel.org, kwilczynski@...nel.org, mani@...nel.org, bhelgaas@...gle.com
> Cc: will@...nel.org, linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org, robh@...nel.org, linux-arm-msm@...r.kernel.org, zhangsenchuan@...incomputing.com, "Manivannan Sadhasivam" <manivannan.sadhasivam@....qualcomm.com>
> Subject: [PATCH 3/3] PCI: dwc: Skip PME_Turn_Off and L2/L3 transition if no device is available
> 
> If there is no device available under the Root Ports, there is no point in
> sending PME_Turn_Off and waiting for L2/L3 transition, it will result in a
> timeout.
> 
> Hence, skip those steps if no device is available during suspend. The
> resume flow remains unchanged.
> 
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@....qualcomm.com>
> ---
>  drivers/pci/controller/dwc/pcie-designware-host.c | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
> index 20c9333bcb1c..b6b8139e91e3 100644
> --- a/drivers/pci/controller/dwc/pcie-designware-host.c
> +++ b/drivers/pci/controller/dwc/pcie-designware-host.c
> @@ -20,6 +20,7 @@
>  #include <linux/platform_device.h>
>  
>  #include "../../pci.h"
> +#include "../pci-host-common.h"
>  #include "pcie-designware.h"
>  
>  static struct pci_ops dw_pcie_ops;
> @@ -1129,6 +1130,9 @@ int dw_pcie_suspend_noirq(struct dw_pcie *pci)
>  	u32 val;
>  	int ret;
>  
> +	if (!pci_root_ports_have_device(pci->pp.bridge->bus))
> +		goto stop_link;
> +
>  	/*
>  	 * If L1SS is supported, then do not put the link into L2 as some
>  	 * devices such as NVMe expect low resume latency.
> @@ -1162,6 +1166,7 @@ int dw_pcie_suspend_noirq(struct dw_pcie *pci)
>  	 */
>  	udelay(1);
>  
> +stop_link:
>  	dw_pcie_stop_link(pci);
>  	if (pci->pp.ops->deinit)
>  		pci->pp.ops->deinit(&pci->pp);
> -- 
> 2.48.1

hi, Manivannan

I'd like your advice on a few things.

If there is no device available under the Root Ports, the dw_pcie_wait_for_link
function in dw_pcie_resume_noirq still need to wait for the link_up? Otherwise
linkup will TIMEDOUT. At this time, when the resume function return, -ETIMEDOUT 
returned which will raise "PM: failed to resume noirq: error -110".

Currently, in the pci-imx6.c/pci-layerscape.c/pcie-stm32.c file, the 
dw_pcie_resume_noirq function is directly returned after use.
Does the pci_root_ports_have_device function help vendor avoid 
this problem?

Best Regards,
Senchuan Zhang

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