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Message-Id: <20251106-qcom-qce-cmd-descr-v8-10-ecddca23ca26@linaro.org>
Date: Thu, 06 Nov 2025 12:34:06 +0100
From: Bartosz Golaszewski <brgl@...ev.pl>
To: Vinod Koul <vkoul@...nel.org>, Jonathan Corbet <corbet@....net>,
Thara Gopinath <thara.gopinath@...il.com>,
Herbert Xu <herbert@...dor.apana.org.au>,
"David S. Miller" <davem@...emloft.net>,
Udit Tiwari <quic_utiwari@...cinc.com>,
Daniel Perez-Zoghbi <dperezzo@...cinc.com>,
Md Sadre Alam <mdalam@....qualcomm.com>
Cc: dmaengine@...r.kernel.org, linux-doc@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org,
linux-crypto@...r.kernel.org,
Bartosz Golaszewski <bartosz.golaszewski@...aro.org>
Subject: [PATCH v8 10/11] crypto: qce - Add support for BAM locking
From: Bartosz Golaszewski <bartosz.golaszewski@...aro.org>
Implement the infrastructure for using the new DMA controller lock/unlock
feature of the BAM driver. No functional change for now.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@...aro.org>
---
drivers/crypto/qce/common.c | 18 ++++++++++++++++++
drivers/crypto/qce/dma.c | 19 +++++++++++++++++--
drivers/crypto/qce/dma.h | 4 ++++
3 files changed, 39 insertions(+), 2 deletions(-)
diff --git a/drivers/crypto/qce/common.c b/drivers/crypto/qce/common.c
index 04253a8d33409a2a51db527435d09ae85a7880af..74756c222fed6d0298eb6c957ed15b8b7083b72f 100644
--- a/drivers/crypto/qce/common.c
+++ b/drivers/crypto/qce/common.c
@@ -593,3 +593,21 @@ void qce_get_version(struct qce_device *qce, u32 *major, u32 *minor, u32 *step)
*minor = (val & CORE_MINOR_REV_MASK) >> CORE_MINOR_REV_SHIFT;
*step = (val & CORE_STEP_REV_MASK) >> CORE_STEP_REV_SHIFT;
}
+
+int qce_bam_lock(struct qce_device *qce)
+{
+ qce_clear_bam_transaction(qce);
+ /* Dummy write to acquire the lock on the BAM pipe. */
+ qce_write(qce, REG_AUTH_SEG_CFG, 0);
+
+ return qce_submit_cmd_desc_lock(qce);
+}
+
+int qce_bam_unlock(struct qce_device *qce)
+{
+ qce_clear_bam_transaction(qce);
+ /* Dummy write to release the lock on the BAM pipe. */
+ qce_write(qce, REG_AUTH_SEG_CFG, 0);
+
+ return qce_submit_cmd_desc_unlock(qce);
+}
diff --git a/drivers/crypto/qce/dma.c b/drivers/crypto/qce/dma.c
index 9bb9a8246cb054dd16b9ab6cf5cfabef51b1ef83..bfdc1397a289b66af1ef482f0dda7aa057a9103d 100644
--- a/drivers/crypto/qce/dma.c
+++ b/drivers/crypto/qce/dma.c
@@ -41,13 +41,13 @@ void qce_clear_bam_transaction(struct qce_device *qce)
bam_txn->pre_bam_ce_idx = 0;
}
-int qce_submit_cmd_desc(struct qce_device *qce)
+static int qce_do_submit_cmd_desc(struct qce_device *qce, unsigned long flags)
{
struct qce_desc_info *qce_desc = qce->dma.bam_txn->desc;
struct qce_bam_transaction *bam_txn = qce->dma.bam_txn;
struct dma_async_tx_descriptor *dma_desc;
struct dma_chan *chan = qce->dma.rxchan;
- unsigned long attrs = DMA_PREP_CMD;
+ unsigned long attrs = DMA_PREP_CMD | flags;
dma_cookie_t cookie;
unsigned int mapped;
int ret;
@@ -76,6 +76,21 @@ int qce_submit_cmd_desc(struct qce_device *qce)
return 0;
}
+int qce_submit_cmd_desc(struct qce_device *qce)
+{
+ return qce_do_submit_cmd_desc(qce, 0);
+}
+
+int qce_submit_cmd_desc_lock(struct qce_device *qce)
+{
+ return qce_do_submit_cmd_desc(qce, DMA_PREP_LOCK);
+}
+
+int qce_submit_cmd_desc_unlock(struct qce_device *qce)
+{
+ return qce_do_submit_cmd_desc(qce, DMA_PREP_UNLOCK);
+}
+
static void qce_prep_dma_cmd_desc(struct qce_device *qce, struct qce_dma_data *dma,
unsigned int addr, void *buf)
{
diff --git a/drivers/crypto/qce/dma.h b/drivers/crypto/qce/dma.h
index f05dfa9e6b25bd60e32f45079a8bc7e6a4cf81f9..4b3ee17db72e29b9f417994477ad8a0ec2294db1 100644
--- a/drivers/crypto/qce/dma.h
+++ b/drivers/crypto/qce/dma.h
@@ -47,6 +47,10 @@ qce_sgtable_add(struct sg_table *sgt, struct scatterlist *sg_add,
unsigned int max_len);
void qce_write_dma(struct qce_device *qce, unsigned int offset, u32 val);
int qce_submit_cmd_desc(struct qce_device *qce);
+int qce_submit_cmd_desc_lock(struct qce_device *qce);
+int qce_submit_cmd_desc_unlock(struct qce_device *qce);
void qce_clear_bam_transaction(struct qce_device *qce);
+int qce_bam_lock(struct qce_device *qce);
+int qce_bam_unlock(struct qce_device *qce);
#endif /* _DMA_H_ */
--
2.51.0
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