linux-kernel - Re: [PATCH v4 1/4] dt-bindings: soc: Add bindings for Airoha SCU Serdes lines

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Message-ID: <690e3774.5d0a0220.2246e9.71a5@mx.google.com>
Date: Fri, 7 Nov 2025 19:16:17 +0100
From: Christian Marangi <ansuelsmth@...il.com>
To: Conor Dooley <conor@...nel.org>
Cc: Vinod Koul <vkoul@...nel.org>,
	Kishon Vijay Abraham I <kishon@...nel.org>,
	Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Lorenzo Bianconi <lorenzo@...nel.org>,
	linux-arm-kernel@...ts.infradead.org, linux-phy@...ts.infradead.org,
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4 1/4] dt-bindings: soc: Add bindings for Airoha SCU
 Serdes lines

On Fri, Nov 07, 2025 at 06:14:31PM +0000, Conor Dooley wrote:
> On Fri, Nov 07, 2025 at 05:02:43PM +0100, Christian Marangi wrote:
> > The Airoha AN7581 SoC can configure the SCU serdes lines for multiple
> > purpose. For example the Serdes for the USB1 port can be both
> > used for USB 3.0 operation or for Ethernet. Or the USB2 serdes can both
> > used for USB 3.0 operation or for PCIe.
> > 
> > The PCIe Serdes can be both used for PCIe operation or for Ethernet.
> > 
> > Add bindings to permit correct reference of the different ports in DT,
> > mostly to differentiate the different supported modes internally to the
> > drivers.
> > 
> > Signed-off-by: Christian Marangi <ansuelsmth@...il.com>
> > ---
> >  include/dt-bindings/soc/airoha,scu-ssr.h | 11 +++++++++++
> >  1 file changed, 11 insertions(+)
> >  create mode 100644 include/dt-bindings/soc/airoha,scu-ssr.h
> > 
> > diff --git a/include/dt-bindings/soc/airoha,scu-ssr.h b/include/dt-bindings/soc/airoha,scu-ssr.h
> > new file mode 100644
> > index 000000000000..a14cef465dad
> > --- /dev/null
> > +++ b/include/dt-bindings/soc/airoha,scu-ssr.h
> > @@ -0,0 +1,11 @@
> > +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
> > +
> > +#ifndef __DT_BINDINGS_AIROHA_SCU_SSR_H
> > +#define __DT_BINDINGS_AIROHA_SCU_SSR_H
> > +
> > +#define AIROHA_SCU_SERDES_PCIE1		0
> > +#define AIROHA_SCU_SERDES_PCIE2		1
> > +#define AIROHA_SCU_SERDES_USB1		0
> > +#define AIROHA_SCU_SERDES_USB2		1
> 
> I'm going to assume that 01 01 is correct here.
> Acked-by: Conor Dooley <conor.dooley@...rochip.com>

Yes the value are then translated in the driver internally.

-- 
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