linux-kernel - Re: [PATCH 1/2] x86/resctrl: Add io_alloc_min_cbm

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Message-ID: <fa2c3cbc-2af6-4d98-bd70-8ab49cb0d83e@amd.com>
Date: Fri, 7 Nov 2025 17:08:03 -0600
From: "Moger, Babu" <bmoger@....com>
To: Aaron Tomlin <atomlin@...mlin.com>
Cc: tony.luck@...el.com, reinette.chatre@...el.com, Dave.Martin@....com,
 james.morse@....com, babu.moger@....com, tglx@...utronix.de,
 mingo@...hat.com, bp@...en8.de, dave.hansen@...ux.intel.com,
 linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/2] x86/resctrl: Add io_alloc_min_cbm_all interface for
 CBM reset



On 11/7/2025 4:25 PM, Aaron Tomlin wrote:
> On Fri, Nov 07, 2025 at 04:02:39PM -0600, Moger, Babu wrote:
>> Hi Aaron,
>>
>> Thanks for trying the patches.
> 
> Hi Babu,
> 
> Thank you very much for taking the time to review the patch and for
> pointing out the efficiency of the existing interface. You are correct that
> option [1], echo "0=0;1=0" > io_alloc_cbm, is also accomplished with a
> single system call.
> 
> However, the primary justification for introducing "io_alloc_min_cbm_all"
> lies in abstraction and the knowledge burden placed upon the user, not the
> system call count.
> 
> To successfully execute option [1], the user is required to have advanced
> knowledge of the system's current cache topology and capabilities:
> 
>      Domain ID Knowledge: The user must know every active Domain ID (e.g.,
>                           0, 1, 2, etc.) that supports the resource and
>                           manually enumerate them in the write string. If a
>                           domain is missed, it will not be reset.
> 
>      Minimal CBM Knowledge: The user must know the minimal supported number
>                             of consecutive bits that constitute a "cleared"
>                             state for each domain. While this is often 0,
>                             relying on this is not architecture-aware.
> 
> The new interface, is designed to abstract this complexity entirely. Also,
> applies the hardware's guaranteed minimum supported CBM (based on
> r->cache.min_cbm_bits) to each domain automatically.
> 
> This unified approach provides a robust and efficient mechanism to
> guarantee a full, architecture-aware reset across all domains, eliminating
> the need for userspace to parse the topology and construct a complex,
> domain-specific input string.
> 
> Please let me know if this clarifies the motivation.
> 

No, I don’t agree with introducing this new interface.

These settings are intended to be modified only by system 
administrators, not general users.

Administrators are already expected to have complete knowledge of the 
hardware and corresponding configuration details. They also typically 
rely on benchmark data to determine appropriate settings.

Additionally, this approach is not consistent with our existing CBM 
setting model.

Thanks
Babu