linux-kernel - [PATCH 3/3] dts: reset: add support for cix sky1 resets

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Message-ID: <20251107033819.587712-4-gary.yang@cixtech.com>
Date: Fri,  7 Nov 2025 11:38:19 +0800
From: Gary Yang <gary.yang@...tech.com>
To: p.zabel@...gutronix.de,
	robh@...nel.org,
	krzk+dt@...nel.org,
	conor+dt@...nel.org
Cc: devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org,
	cix-kernel-upstream@...tech.com,
	Gary Yang <gary.yang@...tech.com>
Subject: [PATCH 3/3] dts: reset: add support for cix sky1 resets

There are two reset conctrollers on Cix Sky1 Soc.
One is located in S0 domain, and the other is located
in S5 domain.

Signed-off-by: Gary Yang <gary.yang@...tech.com>
---
 arch/arm64/boot/dts/cix/sky1.dtsi | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm64/boot/dts/cix/sky1.dtsi b/arch/arm64/boot/dts/cix/sky1.dtsi
index d21387224e79..fc68734f37c2 100644
--- a/arch/arm64/boot/dts/cix/sky1.dtsi
+++ b/arch/arm64/boot/dts/cix/sky1.dtsi
@@ -348,6 +348,13 @@ i3c1: i3c@...0000 {
 			status = "disabled";
 		};
 
+		src_fch: reset-controller@...0000 {
+			compatible = "cix,sky1-rst-fch", "syscon";
+			reg = <0x0 0x04160000 0x0 0x90>;
+			#reset-cells = <1>;
+			status = "okay";
+		};
+
 		iomuxc: pinctrl@...0000 {
 			compatible = "cix,sky1-iomuxc";
 			reg = <0x0 0x04170000 0x0 0x1000>;
@@ -568,6 +575,13 @@ ppi_partition1: interrupt-partition-1 {
 			};
 		};
 
+		src: reset-controller@...00000 {
+			compatible = "cix,sky1-rst", "syscon";
+			reg = <0x0 0x16000000 0x0 0x1000>;
+			#reset-cells = <1>;
+			status = "okay";
+		};
+
 		iomuxc_s5: pinctrl@...07000 {
 			compatible = "cix,sky1-iomuxc-s5";
 			reg = <0x0 0x16007000 0x0 0x1000>;
-- 
2.49.0