Message-ID: <20251107093239.67012-1-amit@kernel.org>
Date: Fri,  7 Nov 2025 10:32:38 +0100
From: Amit Shah <amit@...nel.org>
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	Amit Shah <amit@...nel.org>
Subject: [PATCH v6 0/1] KVM: Add support for the ERAPS feature

Zen5+ AMD CPUs have a larger RSB (64 entries on Zen5), and use all of it in
the host context.  The hypervisor needs to set up a couple things before the
extra 32 entries are exposed to guests.  Add hypervisor support to let the
hardware use the entire RSB in VM contexts as well.

The APM has now been published with details of this feature - and I finally
got around to sending this updated version based on the previous
round. Apologies for the long delays in getting this out; I ended up spending
a bunch of time looking at the NPT=off case:

In the previous round, Sean suggested some emulation for also handling the
NPT=off case.  After discussions on the PUCK call (and some tracing to confirm
what we had wasn't sufficient), I decided to just drop it all and send this
patch for NPT=off.

      	  Amit

v6:
* APM update is out as of July 2025.  Reference it in the commit msg.
* Update commit msg from review comments (Sean)
* Move cpuid enablement to svm.c from x86.c (Tom Lendacky)
* Update bitfield names to reflect what's in the APM
* Update VMCB bits for all nested exits (Sean)
* Drop helper functions and set bitfields directly instead (Sean)

v5:
* Drop RFC tag
* Add separate VMCB01/VMCB02 handling to ensure both L1 and L2 guests are not
  affected by each other's RSB entries
* Rename vmcb_flush_guest_rap() back to vmcb_set_flush_guest_rap().  The
  previous name did not feel right because the call to the function only sets
  a bit in the VMCB which the CPU acts on much later (at VMRUN).

v4:
* Address Sean's comments from v3
  * remove a bunch of comments in favour of a better commit message
* Drop patch 1 from the series - Josh's patches handle the most common case,
  and the AutoIBRS-disabled case can be tackled later if required after Josh's
  patches have been merged upstream.

v3:
* rebase on top of Josh's RSB tweaks series
  * with that rebase, only the non-AutoIBRS case needs special ERAPS support.
    AutoIBRS is currently disabled when SEV-SNP is active (commit acaa4b5c4c8)

* remove comment about RSB_CLEAR_LOOPS and the size of the RSB -- it's not
  necessary anymore with the rework

* remove comment from patch 2 in svm.c in favour of the commit message

v2:
* reword comments to highlight context switch as the main trigger for RSB
  flushes in hardware (Dave Hansen)
* Split out outdated comment updates in (v1) patch1 to be a standalone
  patch1 in this series, to reinforce RSB filling is only required for RSB
  poisoning cases for AMD
  * Remove mentions of BTC/BTC_NO (Andrew Cooper)
* Add braces in case stmt (kernel test robot)
* s/boot_cpu_has/cpu_feature_enabled (Boris Petkov)

Amit Shah (1):
  x86: kvm: svm: set up ERAPS support for guests

 arch/x86/include/asm/cpufeatures.h |  1 +
 arch/x86/include/asm/svm.h         |  6 +++++-
 arch/x86/kvm/cpuid.c               |  8 +++++++-
 arch/x86/kvm/svm/nested.c          |  6 ++++++
 arch/x86/kvm/svm/svm.c             | 11 +++++++++++
 5 files changed, 30 insertions(+), 2 deletions(-)

-- 
2.51.1

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