linux-kernel - Re: [PATCH net-next 8/8] net: dsa: b53: add support for bcm63xx ARL entry format

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Message-ID: <f32775db-f9d8-4e4a-957d-30836e3d4eef@broadcom.com>
Date: Fri, 7 Nov 2025 17:05:19 -0800
From: Florian Fainelli <florian.fainelli@...adcom.com>
To: Jonas Gorski <jonas.gorski@...il.com>, Andrew Lunn <andrew@...n.ch>,
 Vladimir Oltean <olteanv@...il.com>, "David S. Miller"
 <davem@...emloft.net>, Eric Dumazet <edumazet@...gle.com>,
 Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>
Cc: netdev@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH net-next 8/8] net: dsa: b53: add support for bcm63xx ARL
 entry format

On 11/7/2025 12:07 AM, Jonas Gorski wrote:
> The ARL registers of BCM63XX embedded switches are somewhat unique. The
> normal ARL table access registers have the same format as BCM5389, but
> the ARL search registers differ:
> 
> * SRCH_CTL is at the same offset of BCM5389, but 16 bits wide. It does
>    not have more fields, just needs to be accessed by a 16 bit read.
> * SRCH_RSLT_MACVID and SRCH_RSLT are aligned to 32 bit, and have shifted
>    offsets.
> * SRCH_RSLT has a different format than the normal ARL data entry
>    register.
> * There is only one set of ENTRY_N registers, implying a 1 bin layout.
> 
> So add appropriate ops for bcm63xx and let it use it.
> 
> Signed-off-by: Jonas Gorski <jonas.gorski@...il.com>

Reviewed-by: Florian Fainelli <florian.fainelli@...adcom.com>
-- 
Florian