linux-kernel - [PATCH 4/4] mtd: spi-nor: micron-st: enable 8D-8D-8D mode and die erase for mt35xu02gcba

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-Id: <20251110-nor-v1-4-cde50c81db05@nxp.com>
Date: Mon, 10 Nov 2025 12:02:59 +0800
From: Haibo Chen <haibo.chen@....com>
To: Tudor Ambarus <tudor.ambarus@...aro.org>, 
 Pratyush Yadav <pratyush@...nel.org>, Michael Walle <mwalle@...nel.org>, 
 Miquel Raynal <miquel.raynal@...tlin.com>, 
 Richard Weinberger <richard@....at>, Vignesh Raghavendra <vigneshr@...com>
Cc: linux-mtd@...ts.infradead.org, linux-kernel@...r.kernel.org, 
 Haibo Chen <haibo.chen@....com>, imx@...ts.linux.dev
Subject: [PATCH 4/4] mtd: spi-nor: micron-st: enable 8D-8D-8D mode and die
 erase for mt35xu02gcba

mt35xu02gcba is similar with mt35xu01gbba and mt35xu512aba, but with
four dies inside. And it also support 8D-8D-8D mode, but SFDP lack
SNOR_F_IO_MODE_EN_VOLATILE, so add this fixup flags here.

Link: https://datasheet.octopart.com/MT35XU02GCBA1G12-0AAT-Micron-datasheet-138896808.pdf
Signed-off-by: Haibo Chen <haibo.chen@....com>
---
 drivers/mtd/spi-nor/micron-st.c | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/drivers/mtd/spi-nor/micron-st.c b/drivers/mtd/spi-nor/micron-st.c
index f724313f4dd3720908968c670e8d3d58f41c099c..b36174436b7aa0f7768dbe48e4ad4927c08a3d6d 100644
--- a/drivers/mtd/spi-nor/micron-st.c
+++ b/drivers/mtd/spi-nor/micron-st.c
@@ -214,6 +214,12 @@ static const struct spi_nor_fixups mt35xu01gbba_fixups = {
 	.late_init = micron_st_nor_two_die_late_init,
 };
 
+static const struct spi_nor_fixups mt35xu02gcba_fixups = {
+	.default_init = mt35xu512aba_default_init,
+	.post_sfdp = mt35xu512aba_post_sfdp_fixup,
+	.late_init = micron_st_nor_four_die_late_init,
+};
+
 static const struct flash_info micron_nor_parts[] = {
 	{
 		.id = SNOR_ID(0x2c, 0x5b, 0x1a),
@@ -237,12 +243,13 @@ static const struct flash_info micron_nor_parts[] = {
 		.fixups = &mt35xu01gbba_fixups,
 	}, {
 		.id = SNOR_ID(0x2c, 0x5b, 0x1c),
-		.name = "mt35xu02g",
+		.name = "mt35xu02gcba",
 		.sector_size = SZ_128K,
 		.size = SZ_256M,
 		.no_sfdp_flags = SECT_4K | SPI_NOR_OCTAL_READ,
 		.mfr_flags = USE_FSR,
-		.fixup_flags = SPI_NOR_4B_OPCODES,
+		.fixup_flags = SPI_NOR_4B_OPCODES | SPI_NOR_IO_MODE_EN_VOLATILE,
+		.fixups = &mt35xu02gcba_fixups,
 	},
 };
 

-- 
2.34.1