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Message-ID: <7A613E8E5A3767C6+84d31db2-074e-49aa-8e82-bfb78632d2fa@radxa.com>
Date: Tue, 11 Nov 2025 00:21:20 +0900
From: FUKAUMI Naoki <naoki@...xa.com>
To: Niklas Cassel <cassel@...nel.org>, Shawn Lin <shawn.lin@...k-chips.com>,
mani@...nel.org
Cc: Damien Le Moal <dlemoal@...nel.org>, Anand Moon <linux.amoon@...il.com>,
linux-pci@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org,
Dragan Simic <dsimic@...jaro.org>, Lorenzo Pieralisi
<lpieralisi@...nel.org>, Krzysztof Wilczyński
<kw@...ux.com>, Rob Herring <robh@...nel.org>,
Bjorn Helgaas <bhelgaas@...gle.com>, Heiko Stuebner <heiko@...ech.de>
Subject: Re: [RESEND] Re: [PATCH] PCI: dw-rockchip: Skip waiting for link up
Hi Shawn, Mani, Niklas,
I'm testing your patches on ROCK 5A/5C, but the behavior is
inconsistent. Sometimes it works, sometimes it doesn't, and sometimes I
get an oops. I'm a bit confused, so I'll try again tomorrow.
BTW, do you have any idea about this oops?
[ 1.680251] Unable to handle kernel NULL pointer dereference at
virtual address 0000000000000080
[ 1.681039] Mem abort info:
[ 1.681294] ESR = 0x0000000096000004
[ 1.681627] EC = 0x25: DABT (current EL), IL = 32 bits
[ 1.682101] SET = 0, FnV = 0
[ 1.682382] EA = 0, S1PTW = 0
[ 1.682662] FSC = 0x04: level 0 translation fault
[ 1.683119] Data abort info:
[ 1.683381] ISV = 0, ISS = 0x00000004, ISS2 = 0x00000000
[ 1.683869] CM = 0, WnR = 0, TnD = 0, TagAccess = 0
[ 1.684324] GCS = 0, Overlay = 0, DirtyBit = 0, Xs = 0
[ 1.684798] user pgtable: 4k pages, 48-bit VAs, pgdp=000000005630d000
[ 1.685374] [0000000000000080] pgd=0000000000000000, p4d=0000000000000000
[ 1.685983] Internal error: Oops: 0000000096000004 [#1] SMP
[ 1.686483] Modules linked in: phy_rockchip_usbdp typec
phy_rockchip_naneng_combphy phy_rockchip_samsung_hdptx dwmac_rk
stmmac_platform stmmac pcs_xpcs rockchipdrm dw_hdmi_qp analogix_dp
dw_hdmi dw_mipi_dsi drm_dp_aux_bus drm_display_helper cec drm_client_lib
drm_dma_helper drm_kms_helper drm backlight
[ 1.688881] CPU: 0 UID: 0 PID: 171 Comm: irq/87-pcie-sys Tainted: G
W 6.18.0-rc5-dirty #2 PREEMPT
[ 1.689801] Tainted: [W]=WARN
[ 1.690066] Hardware name: radxa Radxa ROCK 5C/Radxa ROCK 5C, BIOS
2025.10-00012-g0c3aff620204-dirty 10/01/2025
[ 1.690952] pstate: 60400009 (nZCv daif +PAN -UAO -TCO -DIT -SSBS
BTYPE=--)
[ 1.691567] pc : of_pci_add_properties+0x284/0x4c4
[ 1.692000] lr : of_pci_add_properties+0x264/0x4c4
[ 1.692426] sp : ffff8000813fbbf0
[ 1.692722] x29: ffff8000813fbc40 x28: ffffcfffe906b3b8 x27:
ffffcfffeb95b1d0
[ 1.693358] x26: ffff000001236980 x25: ffff00007452ceac x24:
ffff000008844600
[ 1.693993] x23: ffff00007452ce00 x22: ffff0000073b3a00 x21:
ffff00000045db10
[ 1.694628] x20: ffff00000057c000 x19: 0000000000000000 x18:
00000000ffffffff
[ 1.695264] x17: 0000000000000000 x16: 0000000000000000 x15:
ffff8000813fba70
[ 1.695898] x14: ffff000000c355b8 x13: ffff000000c355b6 x12:
0000000000000000
[ 1.696533] x11: 00333634353d4d55 x10: 000000000000002c x9 :
0000000000000000
[ 1.697168] x8 : ffff00007479c800 x7 : 0000000000000000 x6 :
0000000000696370
[ 1.697803] x5 : 0000000000000000 x4 : 0000000000000002 x3 :
ffff8000813fbc20
[ 1.698439] x2 : ffffcfffeabc6ef0 x1 : ffff0000073b3a00 x0 :
0000000000000000
[ 1.699074] Call trace:
[ 1.699293] of_pci_add_properties+0x284/0x4c4 (P)
[ 1.699723] of_pci_make_dev_node+0xd8/0x150
[ 1.700109] pci_bus_add_device+0x138/0x168
[ 1.700485] pci_bus_add_devices+0x3c/0x88
[ 1.700853] pci_bus_add_devices+0x68/0x88
[ 1.701220] pci_rescan_bus+0x30/0x44
[ 1.701551] rockchip_pcie_rc_sys_irq_thread+0xb8/0xd0
[ 1.702010] irq_thread_fn+0x2c/0xa8
[ 1.702333] irq_thread+0x168/0x320
[ 1.702648] kthread+0x12c/0x204
[ 1.702941] ret_from_fork+0x10/0x20
[ 1.703267] Code: aa1603e1 f000abc2 d2800044 913bc042 (f94040a0)
Best regards,
--
FUKAUMI Naoki
Radxa Computer (Shenzhen) Co., Ltd.
On 11/10/25 21:41, Niklas Cassel wrote:
> On Mon, Nov 10, 2025 at 01:34:41PM +0100, Niklas Cassel wrote:
>> @@ -672,15 +705,13 @@ int dw_pcie_host_init(struct dw_pcie_rp *pp)
>> if (!pp->use_linkup_irq)
>> /* Ignore errors, the link may come up later */
>> dw_pcie_wait_for_link(pci);
>> -
>> - ret = pci_host_probe(bridge);
>> - if (ret)
>> - goto err_stop_link;
>> -
>> - if (pp->ops->post_init)
>> - pp->ops->post_init(pp);
>> -
>> - dwc_pcie_debugfs_init(pci, DW_PCIE_RC_TYPE);
>> + else
>> + /*
>> + * For platforms with Link Up IRQ, initial scan will be done
>> + * on first Link Up IRQ.
>> + */
>> + if (dw_pcie_host_initial_scan(pp))
>> + goto err_stop_link;
>
> Oops.. this condition was inverted, what I meant was:
>
> diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
> index e92513c5bda5..0e04c1d6d260 100644
> --- a/drivers/pci/controller/dwc/pcie-designware-host.c
> +++ b/drivers/pci/controller/dwc/pcie-designware-host.c
> @@ -565,6 +565,39 @@ static int dw_pcie_host_get_resources(struct dw_pcie_rp *pp)
> return 0;
> }
>
> +static int dw_pcie_host_initial_scan(struct dw_pcie_rp *pp)
> +{
> + struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
> + struct pci_host_bridge *bridge = pp->bridge;
> + int ret;
> +
> + ret = pci_host_probe(bridge);
> + if (ret)
> + return ret;
> +
> + if (pp->ops->post_init)
> + pp->ops->post_init(pp);
> +
> + dwc_pcie_debugfs_init(pci, DW_PCIE_RC_TYPE);
> +
> + return 0;
> +}
> +
> +void dw_pcie_handle_link_up_irq(struct dw_pcie_rp *pp)
> +{
> + if (!pp->initial_linkup_irq_done) {
> + if (dw_pcie_host_initial_scan(pp)) {
> + //TODO: cleanup
> + }
> + pp->initial_linkup_irq_done = true;
> + } else {
> + /* Rescan the bus to enumerate endpoint devices */
> + pci_lock_rescan_remove();
> + pci_rescan_bus(pp->bridge->bus);
> + pci_unlock_rescan_remove();
> + }
> +}
> +
> int dw_pcie_host_init(struct dw_pcie_rp *pp)
> {
> struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
> @@ -669,18 +702,17 @@ int dw_pcie_host_init(struct dw_pcie_rp *pp)
> * If there is no Link Up IRQ, we should not bypass the delay
> * because that would require users to manually rescan for devices.
> */
> - if (!pp->use_linkup_irq)
> + if (!pp->use_linkup_irq) {
> /* Ignore errors, the link may come up later */
> dw_pcie_wait_for_link(pci);
>
> - ret = pci_host_probe(bridge);
> - if (ret)
> - goto err_stop_link;
> -
> - if (pp->ops->post_init)
> - pp->ops->post_init(pp);
> -
> - dwc_pcie_debugfs_init(pci, DW_PCIE_RC_TYPE);
> + /*
> + * For platforms with Link Up IRQ, initial scan will be done
> + * on first Link Up IRQ.
> + */
> + if (dw_pcie_host_initial_scan(pp))
> + goto err_stop_link;
> + }
>
> return 0;
>
> diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
> index e995f692a1ec..a31bd93490dc 100644
> --- a/drivers/pci/controller/dwc/pcie-designware.h
> +++ b/drivers/pci/controller/dwc/pcie-designware.h
> @@ -427,6 +427,7 @@ struct dw_pcie_rp {
> int msg_atu_index;
> struct resource *msg_res;
> bool use_linkup_irq;
> + bool initial_linkup_irq_done;
> struct pci_eq_presets presets;
> struct pci_config_window *cfg;
> bool ecam_enabled;
> @@ -807,6 +808,7 @@ void dw_pcie_msi_init(struct dw_pcie_rp *pp);
> int dw_pcie_msi_host_init(struct dw_pcie_rp *pp);
> void dw_pcie_free_msi(struct dw_pcie_rp *pp);
> int dw_pcie_setup_rc(struct dw_pcie_rp *pp);
> +void dw_pcie_handle_link_up_irq(struct dw_pcie_rp *pp);
> int dw_pcie_host_init(struct dw_pcie_rp *pp);
> void dw_pcie_host_deinit(struct dw_pcie_rp *pp);
> int dw_pcie_allocate_domains(struct dw_pcie_rp *pp);
> @@ -844,6 +846,9 @@ static inline int dw_pcie_setup_rc(struct dw_pcie_rp *pp)
> return 0;
> }
>
> +static inline void dw_pcie_handle_link_up_irq(struct dw_pcie_rp *pp)
> +{ }
> +
> static inline int dw_pcie_host_init(struct dw_pcie_rp *pp)
> {
> return 0;
> diff --git a/drivers/pci/controller/dwc/pcie-dw-rockchip.c b/drivers/pci/controller/dwc/pcie-dw-rockchip.c
> index 8a882dcd1e4e..042e5845bdd6 100644
> --- a/drivers/pci/controller/dwc/pcie-dw-rockchip.c
> +++ b/drivers/pci/controller/dwc/pcie-dw-rockchip.c
> @@ -468,10 +468,7 @@ static irqreturn_t rockchip_pcie_rc_sys_irq_thread(int irq, void *arg)
> if (rockchip_pcie_link_up(pci)) {
> msleep(PCIE_RESET_CONFIG_WAIT_MS);
> dev_dbg(dev, "Received Link up event. Starting enumeration!\n");
> - /* Rescan the bus to enumerate endpoint devices */
> - pci_lock_rescan_remove();
> - pci_rescan_bus(pp->bridge->bus);
> - pci_unlock_rescan_remove();
> + dw_pcie_handle_link_up_irq(pp);
> }
> }
>
>
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