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Message-Id: <20251109-remove_cap-v1-0-2208f46f4dc2@oss.qualcomm.com>
Date: Sun, 09 Nov 2025 22:59:39 -0800
From: Qiang Yu <qiang.yu@....qualcomm.com>
To: Lorenzo Pieralisi <lpieralisi@...nel.org>,
Krzysztof WilczyĆski <kwilczynski@...nel.org>,
Manivannan Sadhasivam <mani@...nel.org>, Rob Herring <robh@...nel.org>,
Bjorn Helgaas <bhelgaas@...gle.com>, Jingoo Han <jingoohan1@...il.com>
Cc: linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-msm@...r.kernel.org, Qiang Yu <qiang.yu@....qualcomm.com>,
Wenbin Yao <wenbin.yao@....qualcomm.com>
Subject: [PATCH 0/5] PCI: Remove unsupported or incomplete PCIe
Capabilities
This patch series addresses issues where certain PCIe Standard or Extended
Capabilities are advertised by the controller, but not fully or at all
implemented in hardware. Exposing such capabilities to the PCI framework
can lead to unexpected or undefined behavior.
The series consists of two main parts:
1. Infrastructure patches (1-2): Add generic capability removal support
2. Platform-specific patches(3-5): Apply fixes for DWC based PCIe Root
Ports and Qualcomm PCIe Root Ports
Patch 1 extends the existing PCI capability finding macros to optionally
return the position of the preceding capability. This information is
essential for capability removal operations, as it allows updating the
"next" pointer of the predecessor to skip over the capability being
removed.
Patch 2 introduces two new APIs in the DesignWare PCIe controller driver:
- dw_pcie_remove_capability() - Remove standard PCI capabilities
- dw_pcie_remove_ext_capability() - Remove extended PCI capabilities
Patch 3 implements automatic MSI/MSI-X capability removal for Root Ports
when using the iMSI-RX module as MSI controller. This addresses the issue
where iMSI-RX cannot generate MSI interrupts for Root Ports, forcing a
fallback to INTx interrupts for Root Ports.
Patch 4 removes MSI-X capability from Qualcomm Root Ports unconditionally.
On platforms like Glymur, MSI-X capability is exposed but lacks the
required Table and PBA structures, leading to SMMU faults when the
capability is used.
Patch 5 removes DPC (Downstream Port Containment) Extended Capability from
Qualcomm platforms. While the capability registers are present, DPC is not
fully supported, and exposing it can cause undefined behavior.
Signed-off-by: Qiang Yu <qiang.yu@....qualcomm.com>
---
Qiang Yu (5):
PCI: Add preceding capability position support and update drivers
PCI: dwc: Add new APIs to remove standard and extended Capability
PCI: dwc: Remove MSI/MSIX capability if iMSI-RX is used as MSI controller
PCI: qcom: Remove MSI-X Capability for Root Ports
PCI: qcom: Remove DPC Extended Capability
drivers/pci/controller/cadence/pcie-cadence.c | 4 +-
drivers/pci/controller/dwc/pcie-designware-ep.c | 2 +-
drivers/pci/controller/dwc/pcie-designware-host.c | 10 ++++
drivers/pci/controller/dwc/pcie-designware.c | 59 +++++++++++++++++++++--
drivers/pci/controller/dwc/pcie-designware.h | 2 +
drivers/pci/controller/dwc/pcie-qcom.c | 3 ++
drivers/pci/pci.c | 8 +--
drivers/pci/pci.h | 23 +++++++--
8 files changed, 97 insertions(+), 14 deletions(-)
---
base-commit: 3a8660878839faadb4f1a6dd72c3179c1df56787
change-id: 20251109-remove_cap-4b7c0600f766
Best regards,
--
Qiang Yu <qiang.yu@....qualcomm.com>
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