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Message-ID: <a0416429-23d4-4f4f-af73-bcd87b4e773c@linux.intel.com>
Date: Mon, 10 Nov 2025 08:23:55 +0800
From: "Mi, Dapeng" <dapeng1.mi@...ux.intel.com>
To: Peter Zijlstra <peterz@...radead.org>
Cc: Ingo Molnar <mingo@...hat.com>, Arnaldo Carvalho de Melo
 <acme@...nel.org>, Namhyung Kim <namhyung@...nel.org>,
 Ian Rogers <irogers@...gle.com>, Adrian Hunter <adrian.hunter@...el.com>,
 Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
 Andi Kleen <ak@...ux.intel.com>, Eranian Stephane <eranian@...gle.com>,
 linux-kernel@...r.kernel.org, linux-perf-users@...r.kernel.org,
 Dapeng Mi <dapeng1.mi@...el.com>, Zide Chen <zide.chen@...el.com>,
 Falcon Thomas <thomas.falcon@...el.com>, Xudong Hao <xudong.hao@...el.com>
Subject: Re: [Patch v9 10/12] perf/x86/intel: Update dyn_constranit base on
 PEBS event precise level


On 11/7/2025 9:05 PM, Peter Zijlstra wrote:
> On Fri, Nov 07, 2025 at 02:11:09PM +0800, Mi, Dapeng wrote:
>> On 11/6/2025 10:52 PM, Peter Zijlstra wrote:
>>> On Wed, Oct 29, 2025 at 06:21:34PM +0800, Dapeng Mi wrote:
>>>> arch-PEBS provides CPUIDs to enumerate which counters support PEBS
>>>> sampling and precise distribution PEBS sampling. Thus PEBS constraints
>>>> should be dynamically configured base on these counter and precise
>>>> distribution bitmap instead of defining them statically.
>>>>
>>>> Update event dyn_constraint base on PEBS event precise level.
>>> What happened to this:
>>>
>>>   https://lore.kernel.org/all/e0b25b3e-aec0-4c43-9ab2-907186b56c71@linux.intel.com/
>> About the issue, Kan ever posted a patch to mitigate the risk, but it seems
>> the patch is not merged yet.
>>
>> https://lore.kernel.org/all/20250512175542.2000708-1-kan.liang@linux.intel.com/
> IIUC the below is what is required handle this new dynamic case, right?
>
> --- a/arch/x86/events/intel/core.c
> +++ b/arch/x86/events/intel/core.c
> @@ -5423,6 +5423,8 @@ enum dyn_constr_type {
>  	DYN_CONSTR_BR_CNTR,
>  	DYN_CONSTR_ACR_CNTR,
>  	DYN_CONSTR_ACR_CAUSE,
> +	DYN_CONSTR_PEBS,
> +	DYN_CONSTR_PDIST,
>  
>  	DYN_CONSTR_MAX,
>  };
> @@ -5432,6 +5434,8 @@ static const char * const dyn_constr_typ
>  	[DYN_CONSTR_BR_CNTR] = "a branch counter logging event",
>  	[DYN_CONSTR_ACR_CNTR] = "an auto-counter reload event",
>  	[DYN_CONSTR_ACR_CAUSE] = "an auto-counter reload cause event",
> +	[DYN_CONSTR_PEBS] = "a PEBS event",
> +	[DYN_CONSTR_PDIST] = "a PEBS PDIST event",
>  };
>  
>  static void __intel_pmu_check_dyn_constr(struct event_constraint *constr,
> @@ -5536,6 +5540,14 @@ static void intel_pmu_check_dyn_constr(s
>  				continue;
>  			mask = hybrid(pmu, acr_cause_mask64) & GENMASK_ULL(INTEL_PMC_MAX_GENERIC - 1, 0);
>  			break;
> +		case DYN_CONSTR_PEBS:
> +			if (x86_pmu.arch_pebs)
> +				mask = hybrid(pmu, arch_pebs_cap).counters;
> +			break;
> +		case DYN_CONSTR_PDIST:
> +			if (x86_pmu.arch_pebs)
> +				mask = hybrid(pmu, arch_pebs_cap).pdists;
> +			break;
>  		default:
>  			pr_warn("Unsupported dynamic constraint type %d\n", i);
>  		}

Yes, exactly. Thanks.



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