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Message-ID: <aj4u7j5pvm4aebyn66lq5yt3e7myvybbp7cyr22jukr4eh4lzf@d356d4b26mjm>
Date: Wed, 12 Nov 2025 20:03:01 +0530
From: Manivannan Sadhasivam <mani@...nel.org>
To: Chen-Yu Tsai <wenst@...omium.org>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@....qualcomm.com>,
Bjorn Helgaas <bhelgaas@...gle.com>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
Bartosz Golaszewski <brgl@...ev.pl>, linux-kernel@...r.kernel.org, linux-pci@...r.kernel.org,
devicetree@...r.kernel.org, linux-arm-msm@...r.kernel.org,
Stephan Gerhold <stephan.gerhold@...aro.org>, Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>,
linux-pm@...r.kernel.org
Subject: Re: [PATCH v2 1/4] dt-bindings: connector: Add PCIe M.2 Mechanical
Key M connector
On Wed, Nov 12, 2025 at 11:57:17AM +0800, Chen-Yu Tsai wrote:
> On Sat, Nov 08, 2025 at 08:53:19AM +0530, Manivannan Sadhasivam wrote:
> > Add the devicetree binding for PCIe M.2 Mechanical Key M connector defined
> > in the PCI Express M.2 Specification, r4.0, sec 5.3. This connector
> > provides interfaces like PCIe and SATA to attach the Solid State Drives
> > (SSDs) to the host machine along with additional interfaces like USB, and
> > SMB for debugging and supplementary features. At any point of time, the
> > connector can only support either PCIe or SATA as the primary host
> > interface.
> >
> > The connector provides a primary power supply of 3.3v, along with an
> > optional 1.8v VIO supply for the Adapter I/O buffer circuitry operating at
> > 1.8v sideband signaling.
> >
> > The connector also supplies optional signals in the form of GPIOs for fine
> > grained power management.
> >
> > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@....qualcomm.com>
> > ---
> > .../bindings/connector/pcie-m2-m-connector.yaml | 122 +++++++++++++++++++++
> > 1 file changed, 122 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/connector/pcie-m2-m-connector.yaml b/Documentation/devicetree/bindings/connector/pcie-m2-m-connector.yaml
> > new file mode 100644
> > index 0000000000000000000000000000000000000000..be0a3b43e8fd2a2a3b76cad4808ddde79dceaa21
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/connector/pcie-m2-m-connector.yaml
> > @@ -0,0 +1,122 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/connector/pcie-m2-m-connector.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: PCIe M.2 Mechanical Key M Connector
> > +
> > +maintainers:
> > + - Manivannan Sadhasivam <manivannan.sadhasivam@....qualcomm.com>
> > +
> > +description:
> > + A PCIe M.2 M connector node represents a physical PCIe M.2 Mechanical Key M
> > + connector. The Mechanical Key M connectors are used to connect SSDs to the
> > + host system over PCIe/SATA interfaces. These connectors also offer optional
> > + interfaces like USB, SMB.
> > +
> > +properties:
> > + compatible:
> > + const: pcie-m2-m-connector
> > +
> > + vpcie3v3-supply:
> > + description: A phandle to the regulator for 3.3v supply.
> > +
> > + vio1v8-supply:
> > + description: A phandle to the regulator for VIO 1.8v supply.
>
> FYI I just added vpcie1v8-supply to the core DT schema [1]. vpcie1v8
> instead of vio1v8 was requested by Rob.
>
Ok, thanks for doing it. I will change the property name in v3 and in the
follow-up series.
- Mani
> [1] https://github.com/devicetree-org/dt-schema/pull/176
>
> > +
> > + ports:
> > + $ref: /schemas/graph.yaml#/properties/ports
> > + description: OF graph bindings modeling the interfaces exposed on the
> > + connector. Since a single connector can have multiple interfaces, every
> > + interface has an assigned OF graph port number as described below.
> > +
> > + properties:
> > + port@0:
> > + $ref: /schemas/graph.yaml#/properties/port
> > + description: PCIe/SATA interface
> > +
> > + port@1:
> > + $ref: /schemas/graph.yaml#/properties/port
> > + description: USB interface
> > +
> > + port@2:
> > + $ref: /schemas/graph.yaml#/properties/port
> > + description: SMB interface
> > +
> > + required:
> > + - port@0
> > +
> > + clocks:
> > + description: 32.768 KHz Suspend Clock (SUSCLK) input from the host system to
> > + the M.2 card. Refer, PCI Express M.2 Specification r4.0, sec 3.1.12.1 for
> > + more details.
> > + maxItems: 1
> > +
> > + pedet-gpios:
> > + description: GPIO controlled connection to PEDET signal. This signal is used
> > + by the host systems to determine the communication protocol that the M.2
> > + card uses; SATA signaling (low) or PCIe signaling (high). Refer, PCI
> > + Express M.2 Specification r4.0, sec 3.3.4.2 for more details.
> > + maxItems: 1
> > +
> > + led1-gpios:
> > + description: GPIO controlled connection to LED_1# signal. This signal is
> > + used by the M.2 card to indicate the card status via the system mounted
> > + LED. Refer, PCI Express M.2 Specification r4.0, sec 3.1.12.2 for more
> > + details.
> > + maxItems: 1
> > +
> > + viocfg-gpios:
> > + description: GPIO controlled connection to IO voltage configuration
> > + (VIO_CFG) signal. This signal is used by the M.2 card to indicate to the
> > + host system that the card supports an independent IO voltage domain for
> > + the sideband signals. Refer, PCI Express M.2 Specification r4.0, sec
> > + 3.1.15.1 for more details.
> > + maxItems: 1
> > +
> > + pwrdis-gpios:
> > + description: GPIO controlled connection to Power Disable (PWRDIS) signal.
> > + This signal is used by the host system to disable power on the M.2 card.
> > + Refer, PCI Express M.2 Specification r4.0, sec 3.3.5.2 for more details.
> > + maxItems: 1
> > +
> > + pln-gpios:
> > + description: GPIO controlled connection to Power Loss Notification (PLN#)
> > + signal. This signal is use to notify the M.2 card by the host system that
> > + the power loss event is expected to occur. Refer, PCI Express M.2
> > + Specification r4.0, sec 3.2.17.1 for more details.
> > + maxItems: 1
> > +
> > + plas3-gpios:
> > + description: GPIO controlled connection to Power Loss Acknowledge (PLA_S3#)
> > + signal. This signal is used by the M.2 card to notify the host system, the
> > + status of the M.2 card's preparation for power loss.
> > + maxItems: 1
> > +
> > +required:
> > + - compatible
> > + - vpcie3v3-supply
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > + # PCI M.2 Key M connector for SSDs with PCIe interface
> > + - |
> > + connector {
> > + compatible = "pcie-m2-m-connector";
> > + vpcie3v3-supply = <&vreg_nvme>;
> > +
> > + ports {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + port@0 {
> > + reg = <0>;
> > +
> > + endpoint {
> > + remote-endpoint = <&pcie6_port0_ep>;
> > + };
> > + };
> > + };
> > + };
> >
> > --
> > 2.48.1
> >
--
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