[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <20251112-eradicate-onslaught-f6cab44cc6b0@spud>
Date: Wed, 12 Nov 2025 14:40:07 +0000
From: Conor Dooley <conor@...nel.org>
To: Prajna Rajendra Kumar <prajna.rajendrakumar@...rochip.com>
Cc: Mark Brown <broonie@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
linux-riscv@...ts.infradead.org, linux-spi@...r.kernel.org,
linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
Conor Dooley <conor.dooley@...rochip.com>,
Daire McNamara <daire.mcnamara@...rochip.com>,
Valentina Fernandez Alanis <valentina.fernandezalanis@...rochip.com>,
Cyril Jean <cyril.jean@...rochip.com>
Subject: Re: [PATCH v3 3/3] spi: add support for microchip "soft" spi
controller
On Fri, Nov 07, 2025 at 05:15:12PM +0000, Conor Dooley wrote:
> On Fri, Nov 07, 2025 at 12:21:04PM +0000, Prajna Rajendra Kumar wrote:
> > Introduce driver support for the Microchip FPGA CoreSPI IP.
> >
> > This driver supports only Motorola SPI mode and frame size of 8-bits.
> > TI/NSC modes and wider frame sizes are not currently supported.
> >
> > Signed-off-by: Prajna Rajendra Kumar <prajna.rajendrakumar@...rochip.com>
>
> Acked-by: Conor Dooley <conor.dooley@...rochip.com>
Now that I think about it, this should probably have been
Reviewed-by: Conor Dooley <conor.dooley@...rochip.com>
Cheers,
Conor.
Download attachment "signature.asc" of type "application/pgp-signature" (229 bytes)
Powered by blists - more mailing lists