linux-kernel - Re: [PATCH v4 02/20] regulator: dt-bindings: add s2mpg10-pmic regulators

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Message-ID: <0bc6fadc6ec9578873fc5413da4405c968bb402b.camel@linaro.org>
Date: Wed, 12 Nov 2025 15:00:39 +0000
From: André Draszik <andre.draszik@...aro.org>
To: Krzysztof Kozlowski <krzk@...nel.org>
Cc: Tudor Ambarus <tudor.ambarus@...aro.org>, Rob Herring <robh@...nel.org>,
  Conor Dooley <conor+dt@...nel.org>, Liam Girdwood <lgirdwood@...il.com>,
 Mark Brown <broonie@...nel.org>,  Lee Jones <lee@...nel.org>, Linus Walleij
 <linus.walleij@...aro.org>, Bartosz Golaszewski	 <brgl@...ev.pl>, Krzysztof
 Kozlowski <krzk+dt@...nel.org>, Peter Griffin	 <peter.griffin@...aro.org>,
 Will McVicker <willmcvicker@...gle.com>, 	kernel-team@...roid.com,
 linux-kernel@...r.kernel.org, 	linux-samsung-soc@...r.kernel.org,
 devicetree@...r.kernel.org, 	linux-gpio@...r.kernel.org
Subject: Re: [PATCH v4 02/20] regulator: dt-bindings: add s2mpg10-pmic
 regulators

Hi Krzysztof,

On Wed, 2025-11-12 at 10:51 +0100, Krzysztof Kozlowski wrote:
> On Mon, Nov 10, 2025 at 07:28:45PM +0000, André Draszik wrote:
> > The S2MPG10 PMIC is a Power Management IC for mobile applications with
> > buck converters, various LDOs, power meters, RTC, clock outputs, and
> > additional GPIO interfaces.
> > 
> > It has 10 buck and 31 LDO rails. Several of these can either be
> > controlled via software (register writes) or via external signals, in
> > particular by:
> >     * one out of several input pins connected to a main processor's:
> >         *  GPIO pins
> >         * other pins that are e.g. firmware- or power-domain-controlled
> >           without explicit driver intervention
> >     * a combination of input pins and register writes.
> > 
> > Control via input pins allows PMIC rails to be controlled by firmware,
> > e.g. during standby/suspend, or as part of power domain handling where
> > otherwise that would not be possible. Additionally toggling a pin is
> > faster than register writes, and it also allows the PMIC to ensure that
> > any necessary timing requirements between rails are respected
> > automatically if multiple rails are to be enabled or disabled quasi
> > simultaneously.
> > 
> > While external control via input pins appears to exist on other
> > versions of this PMIC, there is more flexibility in this version, in
> > particular there is a selection of input pins to choose from for each
> > rail (which must therefore be configured accordingly if in use),
> > whereas other versions don't have this flexibility.
> > 
> > Add documentation related to the regulator (buck & ldo) parts like
> > devicetree definitions, regulator naming patterns, and additional
> > properties.
> > 
> > S2MPG10 is typically used as the main-PMIC together with an S2MPG11
> > PMIC in a main/sub configuration, hence the datasheet and the binding
> > both suffix the rails with an 'm'.
> > 
> > Signed-off-by: André Draszik <andre.draszik@...aro.org>
> > 
> > ---
> 
> What is the base of this? base-commit from cover letter:
> fatal: bad object ab40c92c74c6b0c611c89516794502b3a3173966

v4 was sent on top of next-20251110 which is ab40c92c74c6

Cheers,
Andre'