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Message-ID: <176296444496.1846369.12547968881654162757.robh@kernel.org>
Date: Wed, 12 Nov 2025 10:20:45 -0600
From: "Rob Herring (Arm)" <robh@...nel.org>
To: Vladimir Oltean <vladimir.oltean@....com>
Cc: devicetree@...r.kernel.org, linux-phy@...ts.infradead.org,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Vinod Koul <vkoul@...nel.org>,
Ioana Ciornei <ioana.ciornei@....com>,
Conor Dooley <conor+dt@...nel.org>, linux-kernel@...r.kernel.org,
stable@...r.kernel.org, Kishon Vijay Abraham I <kishon@...nel.org>,
Josua Mayer <josua@...id-run.com>
Subject: Re: [PATCH v4 phy 01/16] dt-bindings: phy: lynx-28g: permit lane OF
PHY providers
On Mon, 10 Nov 2025 11:22:26 +0200, Vladimir Oltean wrote:
> Josua Mayer requested to have OF nodes for each lane, so that he
> (and other board developers) can further describe electrical parameters
> individually.
>
> For this use case, we need a container node to apply the already
> existing Documentation/devicetree/bindings/phy/transmit-amplitude.yaml,
> plus whatever other schemas might get standardized for TX equalization
> parameters, polarity inversion etc.
>
> When lane OF nodes exist, these are also PHY providers ("phys" phandles
> can point directly to them). Compare that to the existing binding, where
> the PHY provider is the top-level SerDes node, and the second cell in
> the "phys" phandle specifies the lane index.
>
> The new binding format overlaps over the old one without interfering,
> but there is a caveat:
>
> Existing device trees, which already have "phys = <&serdes1 0>" cannot
> be converted to "phys = <&serdes_1_lane_a>", because in doing so, we
> would break compatibility with old kernels which don't understand how to
> translate the latter phandle to a PHY.
>
> The transition to the new phandle format can be performed only after a
> reasonable amount of time has elapsed after this schema change and the
> corresponding driver change have been backported to stable kernels.
>
> However, the aforementioned transition is not strictly necessary, and
> the "hybrid" description (where individual lanes have their own OF node,
> but are not pointed to by the "phys" phandle) can remain for an
> indefinite amount of time, even if a little inelegant.
>
> For newly introduced device trees, where there are no compatibility
> concerns with old kernels to speak of, it is strongly recommended to use
> the "phys = <&serdes_1_lane_a>" format. The same holds for phandles
> towards lanes of LX2160A SerDes #3, which at the time of writing is not
> yet described in fsl-lx2160a.dtsi, so there is no legacy to maintain.
>
> To avoid the strange situation where we have a "phy" (SerDes node) ->
> "phy" (lane node) hierarchy, let's rename the expected name of the
> top-level node to "serdes", and update the example too. This has a
> theoretical chance of causing regressions if bootloaders search for
> hardcoded paths rather than using aliases, but to the best of my
> knowledge, for LX2160A/LX2162A this is not the case.
>
> Link: https://lore.kernel.org/lkml/02270f62-9334-400c-b7b9-7e6a44dbbfc9@solid-run.com/
> Cc: Rob Herring <robh@...nel.org>
> Cc: Krzysztof Kozlowski <krzk+dt@...nel.org>
> Cc: Conor Dooley <conor+dt@...nel.org>
> Cc: devicetree@...r.kernel.org
> Cc: stable@...r.kernel.org
> Signed-off-by: Vladimir Oltean <vladimir.oltean@....com>
> ---
> v3-v4: patch is new (broken out from previous "[PATCH v3 phy 12/17]
> dt-bindings: phy: lynx-28g: add compatible strings per SerDes
> and instantiation") to deal just with the lane OF nodes, in a
> backportable way
>
> .../devicetree/bindings/phy/fsl,lynx-28g.yaml | 71 ++++++++++++++++++-
> 1 file changed, 70 insertions(+), 1 deletion(-)
>
Reviewed-by: Rob Herring (Arm) <robh@...nel.org>
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