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Message-ID: <aRTDZ1lU4V5AxIQ5@lizhi-Precision-Tower-5810>
Date: Wed, 12 Nov 2025 12:27:03 -0500
From: Frank Li <Frank.li@....com>
To: Shawn Guo <shawnguo2@...h.net>
Cc: "robh@...nel.org" <robh@...nel.org>,
	Hongxing Zhu <hongxing.zhu@....com>,
	"l.stach@...gutronix.de" <l.stach@...gutronix.de>,
	"lpieralisi@...nel.org" <lpieralisi@...nel.org>,
	"kwilczynski@...nel.org" <kwilczynski@...nel.org>,
	"mani@...nel.org" <mani@...nel.org>,
	"krzk+dt@...nel.org" <krzk+dt@...nel.org>,
	"conor+dt@...nel.org" <conor+dt@...nel.org>,
	"bhelgaas@...gle.com" <bhelgaas@...gle.com>,
	"shawnguo@...nel.org" <shawnguo@...nel.org>,
	"s.hauer@...gutronix.de" <s.hauer@...gutronix.de>,
	"kernel@...gutronix.de" <kernel@...gutronix.de>,
	"festevam@...il.com" <festevam@...il.com>,
	"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
	"linux-arm-kernel@...ts.infradead.org" <linux-arm-kernel@...ts.infradead.org>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"imx@...ts.linux.dev" <imx@...ts.linux.dev>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v6 01/11] arm64: dts: imx95-15x15-evk: Add
 supports-clkreq property to PCIe M.2 port

On Wed, Nov 12, 2025 at 09:50:43AM +0800, Shawn Guo wrote:
> On Tue, Nov 11, 2025 at 11:10:05AM -0500, Frank Li wrote:
> > On Tue, Nov 11, 2025 at 08:02:35AM +0000, Hongxing Zhu wrote:
> > > > -----Original Message-----
> > > > From: Shawn Guo <shawnguo2@...h.net>
> > > > Sent: 2025年11月11日 15:11
> > > > To: Hongxing Zhu <hongxing.zhu@....com>
> > > > Cc: Frank Li <frank.li@....com>; l.stach@...gutronix.de;
> > > > lpieralisi@...nel.org; kwilczynski@...nel.org; mani@...nel.org;
> > > > robh@...nel.org; krzk+dt@...nel.org; conor+dt@...nel.org;
> > > > bhelgaas@...gle.com; shawnguo@...nel.org; s.hauer@...gutronix.de;
> > > > kernel@...gutronix.de; festevam@...il.com; linux-pci@...r.kernel.org;
> > > > linux-arm-kernel@...ts.infradead.org; devicetree@...r.kernel.org;
> > > > imx@...ts.linux.dev; linux-kernel@...r.kernel.org
> > > > Subject: Re: [PATCH v6 01/11] arm64: dts: imx95-15x15-evk: Add
> > > > supports-clkreq property to PCIe M.2 port
> > > >
> > > > On Wed, Oct 15, 2025 at 11:04:18AM +0800, Richard Zhu wrote:
> > > > > According to PCIe r6.1, sec 5.5.1.
> > > > >
> > > > > The following rules define how the L1.1 and L1.2 substates are entered:
> > > > > Both the Upstream and Downstream Ports must monitor the logical state
> > > > > of the CLKREQ# signal.
> > > > >
> > > > > Typical implement is using open drain, which connect RC's clkreq# to
> > > > > EP's clkreq# together and pull up clkreq#.
> > > > >
> > > > > imx95-15x15-evk matches this requirement, so add supports-clkreq to
> > > > > allow PCIe device enter ASPM L1 Sub-State.
> > > > >
> > > > > Signed-off-by: Richard Zhu <hongxing.zhu@....com>
> > > > > ---
> > > > >  arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts | 1 +
> > > > >  1 file changed, 1 insertion(+)
> > > > >
> > > > > diff --git a/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts
> > > > > b/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts
> > > > > index 148243470dd4a..3ee032c154fa3 100644
> > > > > --- a/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts
> > > > > +++ b/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts
> > > > > @@ -556,6 +556,7 @@ &pcie0 {
> > > > >  	pinctrl-names = "default";
> > > > >  	reset-gpio = <&gpio5 13 GPIO_ACTIVE_LOW>;
> > > > >  	vpcie-supply = <&reg_m2_pwr>;
> > > > > +	supports-clkreq;
> > > >
> > > > Is binding updated for this property?
> > > >
> > > > Shawn
> > > >
> > > Hi Shawn:
> > > As I know that It's a documented binding property as below.
> > > - supports-clkreq:
> > >    If present this property specifies that CLKREQ signal routing exists from
> > >    root port to downstream device and host bridge drivers can do programming
> > >    which depends on CLKREQ signal existence. For example, programming root port
> > >    not to advertise ASPM L1 Sub-States support if there is no CLKREQ signal.
> > > ./Documentation/devicetree/bindings/pci/pci.txt
> >
> > Shawn:
> >
> > 	This file should be removed. It is already merge to Rob's dt-scheme
> > as PCIe standard properties.
> >
> > See: https://github.com/devicetree-org/dt-schema/blob/main/dtschema/schemas/pci/pci-bus-common.yaml
>
> Ah, thanks!
>
> Rob,
>
> So it's no longer the case that kernel Documentation/devicetree/bindings
> has all bindings documentation?  Or it's never been the case?  I used to
> grep a property in the folder to see if it's documented or not.

Many common properties already moved to
https://github.com/devicetree-org/dt-schema/blob/main/dtschema/schemas/

Just need run CHEKC_DTBS. Now imx6 (ARM) DTB warning should be around
1k line (after applied my other warning cleanup patches). If narrow down to
patch touched boards, only few warings.

imx8 (ARM64) should be below 100 lines, which cause by recently binding
doc change, suppose it should zero.

Frank

>
> Shawn
>

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