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Message-ID: <alpine.DEB.2.21.2511121802260.25436@angie.orcam.me.uk>
Date: Wed, 12 Nov 2025 23:47:42 +0000 (GMT)
From: "Maciej W. Rozycki" <macro@...am.me.uk>
To: Thomas Bogendoerfer <tsbogend@...ha.franken.de>
cc: Nick Bowler <nbowler@...conx.ca>, Jiaxun Yang <jiaxun.yang@...goat.com>, 
    linux-mips@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] MIPS: mm: Prevent a TLB shutdown on initial
 uniquification

On Wed, 12 Nov 2025, Thomas Bogendoerfer wrote:

> > > Update on the issue: Your patch is good and the segmentation faults,
> > > I'm seeing, have IMHO a different reason. Instead of removing the call
> > > to r4k_tlb_uniquify() I've replaced the jal in the binary with a nop.
> > > And the issue is still there with this patched kernel. I've seen
> > > something similair on a R12k Octanes, which comes and goes probably
> > > depeding on code layout. So far I wasn't able to nail this down :-(
> > 
> >  Oh dear!  Something to do with the cache?  Or code alignment perhaps?
> 
> code alignment is probably the trigger. It's reproducible on an R4400SC
> and R5000 Indy, but not on a R4000SC Indy. Main difference other than
> clock speed is L1 cache size...

 So both combined!  Trust my guts' feeling. ;)  At least you now have a 
reproducer you can fiddle with.  But good luck with debugging as this 
stuff can be tough!

> And I've missremembered the R12k Octane problem. It's not a segmentation
> fault but a bus error, because of an illegal instruction. I tracked it
> down to a incorrect data in I-Cache (all 0 cache line, iirc), but never
> found the reason for that.

 Bummer!

> > > Do you want to send a v2 of the patch ? I'm fine with the current version
> > > for applying...
> > 
> >  I'll send v2 with an update for the Wired register as we talked.  It may 
> > take a day or two.
> 
> no problem, thank you.

 Now posted.  It's often good to sleep on things (an afternoon nap in this 
case).  Thanks for taking the Malta fix BTW.

  Maciej

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