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Message-ID: <d3d49960-b7b6-4270-961e-9895cfdff1be@linux.intel.com>
Date: Wed, 12 Nov 2025 18:36:53 +0800
From: "Mi, Dapeng" <dapeng1.mi@...ux.intel.com>
To: Ingo Molnar <mingo@...nel.org>
Cc: Stephen Rothwell <sfr@...b.auug.org.au>,
 Thomas Gleixner <tglx@...utronix.de>, "H. Peter Anvin" <hpa@...or.com>,
 Peter Zijlstra <peterz@...radead.org>, Kan Liang
 <kan.liang@...ux.intel.com>,
 Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
 Linux Next Mailing List <linux-next@...r.kernel.org>
Subject: Re: [PATCH] perf/x86/intel: Fix and clean up
 intel_pmu_drain_arch_pebs() type use


On 11/12/2025 6:09 PM, Ingo Molnar wrote:
> * Mi, Dapeng <dapeng1.mi@...ux.intel.com> wrote:
>
>> On 11/12/2025 12:42 PM, Stephen Rothwell wrote:
>>> Hi all,
>>>
>>> After merging the tip tree, today's linux-next build (i386 defconfig)
>>> failed like this:
>>>
>>> arch/x86/events/intel/ds.c: In function 'intel_pmu_drain_arch_pebs':
>>> arch/x86/events/intel/ds.c:2983:24: error: cast from pointer to integer of different size [-Werror=pointer-to-int-cast]
>>>  2983 |         top = (void *)((u64)cpuc->pebs_vaddr +
>>>       |                        ^
>>> arch/x86/events/intel/ds.c:2983:15: error: cast to pointer from integer of different size [-Werror=int-to-pointer-cast]
>>>  2983 |         top = (void *)((u64)cpuc->pebs_vaddr +
>>>       |               ^
>>> cc1: all warnings being treated as errors
>> Thanks for reporting the issue. I suppose the below patch would fix the
>> building error. I would post it as an independent patch later.
>>
>> diff --git a/arch/x86/events/intel/ds.c b/arch/x86/events/intel/ds.c
>> index c93bf971d97b..f695de9f7049 100644
>> --- a/arch/x86/events/intel/ds.c
>> +++ b/arch/x86/events/intel/ds.c
>> @@ -2979,7 +2979,7 @@ static void intel_pmu_drain_arch_pebs(struct pt_regs
>> *iregs,
>>         }
>>
>>         base = cpuc->pebs_vaddr;
>> -       top = (void *)((u64)cpuc->pebs_vaddr +
>> +       top = (void *)((unsigned long)cpuc->pebs_vaddr +
>>                        (index.wr << ARCH_PEBS_INDEX_WR_SHIFT));
> This doesn't really address the core issue: ugly, fragile code due to 
> type confusion. The proper fix is:
>
> 	top = cpuc->pebs_vaddr + (index.wr << ARCH_PEBS_INDEX_WR_SHIFT);
>
> which is also much cleaner, see:
>
> 	60f9f1d43720 ("perf/x86/intel: Fix and clean up intel_pmu_drain_arch_pebs() type use")
>
> (also attached below.)
>
> All this should be resolved in the latest -tip tree.
>
> Thanks,
>
> 	Ingo
>
> =====================>
> From 60f9f1d437201f6c457fc8a56f9df6d8a6d0bea6 Mon Sep 17 00:00:00 2001
> From: Ingo Molnar <mingo@...nel.org>
> Date: Wed, 12 Nov 2025 10:40:26 +0100
> Subject: [PATCH] perf/x86/intel: Fix and clean up intel_pmu_drain_arch_pebs() type use
>
> The following commit introduced a build failure on x86-32:
>
>   2721e8da2de7 ("perf/x86/intel: Allocate arch-PEBS buffer and initialize PEBS_BASE MSR")
>
>   ...
>
>   arch/x86/events/intel/ds.c:2983:24: error: cast from pointer to integer of different size [-Werror=pointer-to-int-cast]
>
> The forced type conversion to 'u64' and 'void *' are not 32-bit clean,
> but they are also entirely unnecessary: ->pebs_vaddr is 'void *' already,
> and integer-compatible pointer arithmetics will work just fine on it.
>
> Fix & simplify the code.
>
> Fixes: 2721e8da2de7 ("perf/x86/intel: Allocate arch-PEBS buffer and initialize PEBS_BASE MSR")

Hi Ingo,

Thanks a lot for fixing this issue.

BTW, the offensive commit should be the below one instead of '2721e8da2de7
("perf/x86/intel: Allocate arch-PEBS buffer and initialize PEBS_BASE MSR") '.

d21954c8a0ff ("perf/x86/intel: Process arch-PEBS records or record fragments")

- Dapeng Mi

> Signed-off-by: Ingo Molnar <mingo@...nel.org>
> Acked-by: Peter Zijlstra (Intel) <peterz@...radead.org>
> Cc: Kan Liang <kan.liang@...ux.intel.com>
> Cc: Dapeng Mi <dapeng1.mi@...ux.intel.com>
> Link: https://patch.msgid.link/20251029102136.61364-10-dapeng1.mi@linux.intel.com
> ---
>  arch/x86/events/intel/ds.c | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/arch/x86/events/intel/ds.c b/arch/x86/events/intel/ds.c
> index c93bf971d97b..2e170f2093ac 100644
> --- a/arch/x86/events/intel/ds.c
> +++ b/arch/x86/events/intel/ds.c
> @@ -2979,8 +2979,7 @@ static void intel_pmu_drain_arch_pebs(struct pt_regs *iregs,
>  	}
>  
>  	base = cpuc->pebs_vaddr;
> -	top = (void *)((u64)cpuc->pebs_vaddr +
> -		       (index.wr << ARCH_PEBS_INDEX_WR_SHIFT));
> +	top = cpuc->pebs_vaddr + (index.wr << ARCH_PEBS_INDEX_WR_SHIFT);
>  
>  	index.wr = 0;
>  	index.full = 0;

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