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Message-ID: <20251112-upstream_uboot_properties-v1-3-0b19133710e3@foss.st.com>
Date: Wed, 12 Nov 2025 11:46:45 +0100
From: Patrice Chotard <patrice.chotard@...s.st.com>
To: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Maxime Coquelin
<mcoquelin.stm32@...il.com>,
Alexandre Torgue <alexandre.torgue@...s.st.com>,
Patrick Delaunay <patrick.delaunay@...s.st.com>
CC: <devicetree@...r.kernel.org>, <linux-stm32@...md-mailman.stormreply.com>,
<linux-arm-kernel@...ts.infradead.org>, <linux-kernel@...r.kernel.org>,
Patrice Chotard <patrice.chotard@...s.st.com>
Subject: [PATCH 3/6] ARM: dts: stm32: Add boot phase tags for
STMicroelectronics h7 boards
The bootph-all flag was introduced in dt-schema
(dtschema/schemas/bootph.yaml) to define node usage across
different boot phases.
To ensure SD boot, timer, gpio, syscfg, clock and uart nodes need to be
present in all boot stages, so add missing bootph-all phase flag
to these nodes to support SD boot.
Signed-off-by: Patrice Chotard <patrice.chotard@...s.st.com>
---
arch/arm/boot/dts/st/stm32h743.dtsi | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/arch/arm/boot/dts/st/stm32h743.dtsi b/arch/arm/boot/dts/st/stm32h743.dtsi
index 2f19cfbc57ad..790e4558c905 100644
--- a/arch/arm/boot/dts/st/stm32h743.dtsi
+++ b/arch/arm/boot/dts/st/stm32h743.dtsi
@@ -50,22 +50,26 @@ / {
#size-cells = <1>;
clocks {
+ bootph-all;
clk_hse: clk-hse {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <0>;
+ bootph-all;
};
clk_lse: clk-lse {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <32768>;
+ bootph-all;
};
clk_i2s: i2s_ckin {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <0>;
+ bootph-all;
};
};
@@ -75,6 +79,7 @@ timer5: timer@...00c00 {
reg = <0x40000c00 0x400>;
interrupts = <50>;
clocks = <&rcc TIM5_CK>;
+ bootph-all;
};
lptimer1: timer@...02400 {
@@ -547,11 +552,13 @@ rcc: reset-clock-controller@...24400 {
#reset-cells = <1>;
clocks = <&clk_hse>, <&clk_lse>, <&clk_i2s>;
st,syscfg = <&pwrcfg>;
+ bootph-all;
};
pwrcfg: power-config@...24800 {
compatible = "st,stm32-power-config", "syscon";
reg = <0x58024800 0x400>;
+ bootph-all;
};
adc_3: adc@...26000 {
@@ -596,6 +603,7 @@ pinctrl: pinctrl@...20000 {
ranges = <0 0x58020000 0x3000>;
interrupt-parent = <&exti>;
st,syscfg = <&syscfg 0x8>;
+ bootph-all;
gpioa: gpio@...20000 {
gpio-controller;
@@ -607,6 +615,7 @@ gpioa: gpio@...20000 {
#interrupt-cells = <2>;
ngpios = <16>;
gpio-ranges = <&pinctrl 0 0 16>;
+ bootph-all;
};
gpiob: gpio@...20400 {
@@ -619,6 +628,7 @@ gpiob: gpio@...20400 {
#interrupt-cells = <2>;
ngpios = <16>;
gpio-ranges = <&pinctrl 0 16 16>;
+ bootph-all;
};
gpioc: gpio@...20800 {
@@ -631,6 +641,7 @@ gpioc: gpio@...20800 {
#interrupt-cells = <2>;
ngpios = <16>;
gpio-ranges = <&pinctrl 0 32 16>;
+ bootph-all;
};
gpiod: gpio@...20c00 {
@@ -643,6 +654,7 @@ gpiod: gpio@...20c00 {
#interrupt-cells = <2>;
ngpios = <16>;
gpio-ranges = <&pinctrl 0 48 16>;
+ bootph-all;
};
gpioe: gpio@...21000 {
@@ -655,6 +667,7 @@ gpioe: gpio@...21000 {
#interrupt-cells = <2>;
ngpios = <16>;
gpio-ranges = <&pinctrl 0 64 16>;
+ bootph-all;
};
gpiof: gpio@...21400 {
@@ -667,6 +680,7 @@ gpiof: gpio@...21400 {
#interrupt-cells = <2>;
ngpios = <16>;
gpio-ranges = <&pinctrl 0 80 16>;
+ bootph-all;
};
gpiog: gpio@...21800 {
@@ -679,6 +693,7 @@ gpiog: gpio@...21800 {
#interrupt-cells = <2>;
ngpios = <16>;
gpio-ranges = <&pinctrl 0 96 16>;
+ bootph-all;
};
gpioh: gpio@...21c00 {
@@ -691,6 +706,7 @@ gpioh: gpio@...21c00 {
#interrupt-cells = <2>;
ngpios = <16>;
gpio-ranges = <&pinctrl 0 112 16>;
+ bootph-all;
};
gpioi: gpio@...22000 {
@@ -703,6 +719,7 @@ gpioi: gpio@...22000 {
#interrupt-cells = <2>;
ngpios = <16>;
gpio-ranges = <&pinctrl 0 128 16>;
+ bootph-all;
};
gpioj: gpio@...22400 {
@@ -715,6 +732,7 @@ gpioj: gpio@...22400 {
#interrupt-cells = <2>;
ngpios = <16>;
gpio-ranges = <&pinctrl 0 144 16>;
+ bootph-all;
};
gpiok: gpio@...22800 {
@@ -727,6 +745,7 @@ gpiok: gpio@...22800 {
#interrupt-cells = <2>;
ngpios = <8>;
gpio-ranges = <&pinctrl 0 160 8>;
+ bootph-all;
};
};
};
--
2.43.0
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