Message-ID: <6490f20a-2492-4ee0-8f34-d529e0df0bad@kernel.org>
Date: Thu, 13 Nov 2025 17:34:14 +0100
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Doug Anderson <dianders@...omium.org>
Cc: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
 Conor Dooley <conor+dt@...nel.org>, Peter Griffin
 <peter.griffin@...aro.org>, André Draszik
 <andre.draszik@...aro.org>, Tudor Ambarus <tudor.ambarus@...aro.org>,
 linux-samsung-soc@...r.kernel.org, Roy Luo <royluo@...gle.com>,
 devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
 Chen-Yu Tsai <wenst@...omium.org>, Julius Werner <jwerner@...omium.org>,
 William McVicker <willmcvicker@...gle.com>, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/4] dt-bindings: arm: google: Add bindings for
 frankel/blazer/mustang

On 13/11/2025 17:23, Doug Anderson wrote:
> Hi,
> 
> On Wed, Nov 12, 2025 at 11:23 PM Krzysztof Kozlowski <krzk@...nel.org> wrote:
>>
>>>>> +      # Google Tensor G5 AKA lga (laguna) SoC and boards
>>>>> +      - description: Tensor G5 SoC (laguna)
>>>>> +        items:
>>>>> +          - enum:
>>>>> +              - google,soc-id-0005-rev-00  # A0
>>>>> +              - google,soc-id-0005-rev-10  # B0
>>>>
>>>> SoCs cannot be final compatibles.
>>>
>>> Right. I talked about this at length "after the cut" in my patch. See
>>> above. I wish to relitigate this policy and wish to know more details
>>> about where it is documented, the reasons for decision, and where the
>>> boundary exactly lies between something that's allowed to be a final
>>> compatible and something that's not. I made several arguments above
>>> for why I think the SoC should be allowed as a final compatible, so it
>>
>> Because this represents a actual device users run. It is electronically,
>> physically impossible to run the SoC alone.
> 
> I'm not convinced that this definition is as clear as you're making it
> out to be. It's physically impossible to run many "boards" alone.
> 
> Want to boot up a Raspberry Pi? Provide it with power. Hook up a
> display to it. Hook up a keyboard to it. Plug in an Ethernet cable.
> Plug an SD card in it. Without those things it doesn't run.

But I can plug them...

> 
> Want to boot up a lga-B0 SoC? Hook up power to the power pins. Connect
> a MIPI panel to the MIPI pins. Connect a UFS chip to the UFS pins.
> Without those things it doesn't run.

These I cannot plug, it's impossible for me.

My clumsy fingers are too big for these pins.

And following your logic, we should have the compatible for the
transistors, because that's basically what SoC is made of.

> 
> Yes, the complexity of just "hooking up" the components on an SoC is
> an order of magnitude harder than a Raspberry Pi, but it's still just
> hooking it up to external components. In both cases, we are modeling
> the core "brains" (the part that contains the processor) as the DTB
> and everything else just "hooks up" to interfaces.

You mix the topics, so I don't follow. I speak here about bindings - you
cannot have the that compatible alone, because it is incomplete, just
like compatible for "transistor" is not correct in that context. You
speak what could or could be DTB, different topic.

> 
> If I had to make a definition for what the base DTB should be it
> should be the component with the boot CPU. _Why_ is that the wrong
> definition?
> 
> 
>> There are few - one or two - exceptions for the SoMs, but never for SoC.
> 
> OK, but the big question: _WHY???_
> 
> Where does it say that a DTB has to be something that can run "alone"

We don't discuss DTB here, but the top-level compatibles.

Why? Because DT spec says so.

"Specifies a list of platform architectures with which this platform is
compatible. "

And when you combine it with the standard definition of the
"compatible", it is not *a* "platform architecture" but *list* of
platform architectures describing this device as a whole.


Best regards,
Krzysztof

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