[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <176306032240.2459767.9191020544205608195.b4-ty@arm.com>
Date: Thu, 13 Nov 2025 18:58:42 +0000
From: Catalin Marinas <cmarinas@...nel.org>
To: will@...nel.org,
Dev Jain <dev.jain@....com>
Cc: Catalin Marinas <catalin.marinas@....com>,
anshuman.khandual@....com,
wangkefeng.wang@...wei.com,
ryan.roberts@....com,
baohua@...nel.org,
pjaroszynski@...dia.com,
linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: Re: [RESEND] [PATCH v2] arm64/mm: Elide TLB flush in certain pte protection transitions
From: Catalin Marinas <catalin.marinas@....com>
On Fri, 17 Oct 2025 21:32:51 +0530, Dev Jain wrote:
> Currently arm64 does an unconditional TLB flush in mprotect(). This is not
> required for some cases, for example, when changing from PROT_NONE to
> PROT_READ | PROT_WRITE (a real usecase - glibc malloc does this to emulate
> growing into the non-main heaps), and unsetting uffd-wp in a range.
>
> Therefore, implement pte_needs_flush() for arm64, which is already
> implemented by some other arches as well.
>
> [...]
Applied to arm64 (for-next/misc), thanks!
[1/1] arm64/mm: Elide TLB flush in certain pte protection transitions
https://git.kernel.org/arm64/c/c320dbb7c80d
--
Catalin
Powered by blists - more mailing lists