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Message-ID: <176306037418.2469077.5379528252615859360.b4-ty@arm.com>
Date: Thu, 13 Nov 2025 19:01:00 +0000
From: Catalin Marinas <cmarinas@...nel.org>
To: linux-arm-kernel@...ts.infradead.org,
kvmarm@...ts.linux.dev,
linux-kernel@...r.kernel.org,
kvm@...r.kernel.org,
Sascha Bischoff <Sascha.Bischoff@....com>
Cc: Will Deacon <will@...nel.org>,
Catalin Marinas <catalin.marinas@....com>,
nd <nd@....com>,
Mark Rutland <Mark.Rutland@....com>,
Mark Brown <broonie@...nel.org>,
Catalin Marinas <Catalin.Marinas@....com>,
maz@...nel.org,
oliver.upton@...ux.dev,
Joey Gouly <Joey.Gouly@....com>,
Suzuki Poulose <Suzuki.Poulose@....com>,
yuzenghui@...wei.com,
lpieralisi@...nel.org
Subject: Re: (subset) [PATCH v3 0/5] arm64/sysreg: Introduce Prefix descriptor and generated ICH_VMCR_EL2 support
From: Catalin Marinas <catalin.marinas@....com>
On Wed, 22 Oct 2025 13:45:35 +0000, Sascha Bischoff wrote:
> This series introduces support for conditional field encodings in the
> sysreg description framework and migrates the vGIC-v3 code to use
> generated definitions for ICH_VMCR_EL2, in part as an example of how
> the Prefix descriptor can be used. In addition, it fixes an issue with
> the tracking of incomplete system register definitions.
>
> Together, these patches complete the migration of ICH_VMCR_EL2 to the
> sysreg framework and establish the infrastructure needed to describe
> registers with multiple field encodings.
>
> [...]
Applied to arm64 (for-next/sysreg), thanks!
[1/5] arm64/sysreg: Fix checks for incomplete sysreg definitions
https://git.kernel.org/arm64/c/0aab5772a53d
[2/5] arm64/sysreg: Support feature-specific fields with 'Prefix' descriptor
https://git.kernel.org/arm64/c/fe2ef46995d5
[3/5] arm64/sysreg: Move generation of RES0/RES1/UNKN to function
https://git.kernel.org/arm64/c/a0b130eedde0
[4/5] arm64/sysreg: Add ICH_VMCR_EL2
https://git.kernel.org/arm64/c/a04fbfb8a175
I left the last patch to Marc/Oliver.
--
Catalin
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