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Message-ID: <20251113034923.9699-1-zhangtianyang@loongson.cn>
Date: Thu, 13 Nov 2025 11:49:18 +0800
From: Tianyang Zhang <zhangtianyang@...ngson.cn>
To: chenhuacai@...nel.org,
kernel@...0n.name,
akpm@...ux-foundation.org,
willy@...radead.org,
david@...hat.com,
linmag7@...il.com,
thuth@...hat.com,
maobibo@...ngson.cn,
apopple@...dia.com
Cc: loongarch@...ts.linux.dev,
linux-kernel@...r.kernel.org,
Tianyang Zhang <zhangtianyang@...ngson.cn>
Subject: [PATCH v6 0/2] Loongarch irq-redirect support
This series of patches introduces support for interrupt-redirect
controllers, and this hardware feature will be supported on 3C6000
for the first time
change log:
v0->v1:
1.Rename the model names in the document.
2.Adjust the code format.
3.Remove architecture - specific prefixes.
4.Refactor the initialization logic, and IR driver no longer set
AVEC_ENABLE.
5.Enhance compatibility under certain configurations.
v1->v2:
1.Fixed an erroneous enabling issue.
v2->v3
1.Replace smp_call with address mapping to access registers
2.Fix some code style issues
v3->v4
1.Provide reasonable comments on the modifications made to
IRQ_SET_MASK_OK_DONE
2.Replace meaningless empty functions with parent_mask/unmask/ack
3.Added and indeed released resources
4.Added judgment for data structure initialization completion to
avoid duplicate creation during cpuhotplug
5.Fixed the code style and some unnecessary troubles
v4->v5
1.when it is detected in avecintc_set_affinity that the current affinity
remains valid, the return value is modified to IRQ_SET_MASK_OK_DONE.
After the introduction of redirect-domain, for each interrupt source,
avecintc-domain only provides the CPU/interrupt vector, while redirect-domain
provides other operations to synchronize interrupt affinity information
among multiple cores. The original intention is to notify the cascaded
redirect_set_affinity that multi-core synchronization is not required.
However, this introduces some compatibility issues, such as the new return
value causing msi_domain_set_affinity to no longer perform irq_chip_write_msi_msg.
1) When redirect exist in the system, the msi msg_address and msg_data no
longer changes after the allocation phase, so it does not actually require updating
the MSI message info.
2) When only avecintc exists in the system, the irq_domain_activate_irq
interface will be responsible for the initial configuration of the MSI message,
which is unconditional. After that, if unnecessary, no modification to the MSI
message is alse correctly.
2.Restructured the macro definitions to make them appear more logical.
3.Adjusted the layout of members struct redirect_queue\struct redirect_table and
struct redirect_item, making redirect_item the primary interface for accessing
other members.
4.The method of accessing registers has been standardized to MMIO.
5.Initialize variables at declaration whenever possible.
6.Replaced the the "struct page" in redirect_table and redirect_queue with "struct folio".
7.Adjusted the initialization process so that all irq_desc configurations are completed
during driver initialization, no longer relying on specific CPUs being online.
8.Refactored portions of the code to make them more concise and logical.
v5->v6
Fix the warning messages reported by the test bot.
Tianyang Zhang (2):
Docs/LoongArch: Add Advanced Extended-Redirect IRQ model description
irqchip/irq-loongarch-ir:Add Redirect irqchip support
.../arch/loongarch/irq-chip-model.rst | 38 ++
.../zh_CN/arch/loongarch/irq-chip-model.rst | 37 ++
arch/loongarch/include/asm/cpu-features.h | 1 +
arch/loongarch/include/asm/cpu.h | 2 +
arch/loongarch/include/asm/loongarch.h | 6 +
arch/loongarch/kernel/cpu-probe.c | 2 +
drivers/irqchip/Makefile | 2 +-
drivers/irqchip/irq-loongarch-avec.c | 20 +-
drivers/irqchip/irq-loongarch-ir.c | 527 ++++++++++++++++++
drivers/irqchip/irq-loongson.h | 19 +
10 files changed, 640 insertions(+), 14 deletions(-)
create mode 100644 drivers/irqchip/irq-loongarch-ir.c
--
2.41.0
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