[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-ID: <20251113084441.2124737-1-Johnny-CC.Chang@mediatek.com>
Date: Thu, 13 Nov 2025 16:44:06 +0800
From: Johnny Chang <Johnny-CC.Chang@...iatek.com>
To: Bjorn Helgaas <bhelgaas@...gle.com>, Matthias Brugger
<matthias.bgg@...il.com>, AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>
CC: <linux-pci@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>, <linux-mediatek@...ts.infradead.org>,
<Project_Global_Digits_Upstream_Group@...iatek.com>, Johnny-CC Chang
<Johnny-CC.Chang@...iatek.com>
Subject: [PATCH] PCI: Mark Nvidia GB10 to avoid bus reset
From: Johnny-CC Chang <Johnny-CC.Chang@...iatek.com>
Nvidia GB10 PCIe hosts will encounter problem occasionally
after SBR(secondary bus reset) is applied.
Enable NO_BUS_RESET quirk for Nvidia GB10 PCIe hosts.
Signed-off-by: Johnny-CC Chang <Johnny-CC.Chang@...iatek.com>
---
drivers/pci/quirks.c | 11 +++++++++++
include/linux/pci_ids.h | 2 ++
2 files changed, 13 insertions(+)
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index b94264cd3833..12a10fa84c8a 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -3746,6 +3746,17 @@ static void quirk_no_bus_reset(struct pci_dev *dev)
dev->dev_flags |= PCI_DEV_FLAGS_NO_BUS_RESET;
}
+/*
+ * Nvidia GB10 PCIe hosts will encounter problem occasionally
+ * after SBR (secondary bus reset) is applied.
+ * SBR needs to be prevented for these PCIe hosts.
+ */
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_GB10_GEN5_X4,
+ quirk_no_bus_reset);
+
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_GB10_GEN4_X1,
+ quirk_no_bus_reset);
+
/*
* Some NVIDIA GPU devices do not work with bus reset, SBR needs to be
* prevented for those affected devices.
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 92ffc4373f6d..661dc1594213 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -1382,6 +1382,8 @@
#define PCI_DEVICE_ID_NVIDIA_GEFORCE_320M 0x08A0
#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP79_SMBUS 0x0AA2
#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP89_SATA 0x0D85
+#define PCI_DEVICE_ID_NVIDIA_GB10_GEN5_X4 0x22CE
+#define PCI_DEVICE_ID_NVIDIA_GB10_GEN4_X1 0x22D0
#define PCI_VENDOR_ID_IMS 0x10e0
#define PCI_DEVICE_ID_IMS_TT128 0x9128
--
2.45.2
Powered by blists - more mailing lists