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Message-ID: <20251113085332.89688-1-chin-ting_kuo@aspeedtech.com>
Date: Thu, 13 Nov 2025 16:53:28 +0800
From: Chin-Ting Kuo <chin-ting_kuo@...eedtech.com>
To: <robh@...nel.org>, <krzk+dt@...nel.org>, <conor+dt@...nel.org>,
	<joel@....id.au>, <andrew@...econstruct.com.au>, <clg@...d.org>,
	<clg@...hat.com>, <broonie@...nel.org>, <devicetree@...r.kernel.org>,
	<linux-arm-kernel@...ts.infradead.org>, <linux-aspeed@...ts.ozlabs.org>,
	<linux-kernel@...r.kernel.org>, <openbmc@...ts.ozlabs.org>,
	<linux-spi@...r.kernel.org>, <BMC-SW@...eedtech.com>
Subject: [PATCH 0/4] spi: aspeed: Add AST2700 SoC support and Quad SPI handling update

This series adds AST2700 support to the ASPEED FMC/SPI driver and
bindings, introduces 64-bit address compatibility, and improves
Quad SPI page programming behavior. It also implements AST2700-specific
segment logic, where range adjustment is not required because the
AST2700 SPI hardware controller already fixes decoding issues on
the existing platforms and adopts an updated scheme.

Chin-Ting Kuo (4):
  dt-bindings: spi: aspeed,ast2600-fmc: Add AST2700 SoC support
  spi: aspeed: Enable Quad SPI mode for page program
  spi: aspeed: Use phys_addr_t for bus addresses to support 64-bit
    platforms
  spi: aspeed: Add support for the AST2700 SPI controller

 .../bindings/spi/aspeed,ast2600-fmc.yaml      |   4 +-
 drivers/spi/spi-aspeed-smc.c                  | 107 +++++++++++++++---
 2 files changed, 95 insertions(+), 16 deletions(-)

-- 
2.34.1


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