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Message-ID: <a1306c3a-5d2e-48e0-aaa8-4e19ea81bef3@arm.com>
Date: Thu, 13 Nov 2025 14:48:44 +0530
From: Anshuman Khandual <anshuman.khandual@....com>
To: linux-arm-kernel@...ts.infradead.org
Cc: Catalin Marinas <catalin.marinas@....com>, Will Deacon <will@...nel.org>,
Ryan Roberts <ryan.roberts@....com>, Ard Biesheuvel <ardb@...nel.org>,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH 0/6] arm64/mm: TTBRx_EL1 related changes
On 03/11/25 10:56 AM, Anshuman Khandual wrote:
> This series contains some TTBRx_EL1 related changes, aimed at standardizing
> TTBRx_EL1 register field accesses via tools sysreg format and also explains
> 52 PA specific handling methods via a new macro along with in code comments
>
> This series applies on v6.18-rc4
>
> Cc: Catalin Marinas <catalin.marinas@....com>
> Cc: Will Deacon <will@...nel.org>
> Cc: Ryan Roberts <ryan.roberts@....com>
> Cc: Ard Biesheuvel <ardb@...nel.org>
> Cc: linux-arm-kernel@...ts.infradead.org
> Cc: linux-kernel@...r.kernel.org
>
> Anshuman Khandual (6):
> arm64/mm: Directly use TTBRx_EL1_ASID_MASK
> arm64/mm: Directly use TTBRx_EL1_CnP
> arm64/mm: Represent TTBR_BADDR_MASK_52 with TTBRx_EL1_BADDR_MASK
> arm64/mm: Ensure correct 48 bit PA gets into TTBRx_EL1
> arm64/mm: Describe 52 PA folding into TTBRx_EL1
> arm64/mm: Describe TTBR1_BADDR_4852_OFFSET
>
> arch/arm64/include/asm/asm-uaccess.h | 2 +-
> arch/arm64/include/asm/assembler.h | 3 ++-
> arch/arm64/include/asm/mmu_context.h | 2 +-
> arch/arm64/include/asm/pgtable-hwdef.h | 23 ++++++++++++++++++++---
> arch/arm64/include/asm/pgtable.h | 5 +++--
> arch/arm64/include/asm/uaccess.h | 6 +++---
> arch/arm64/kernel/entry.S | 2 +-
> arch/arm64/kernel/mte.c | 4 ++--
> arch/arm64/mm/context.c | 8 ++++----
> arch/arm64/mm/mmu.c | 2 +-
> 10 files changed, 38 insertions(+), 19 deletions(-)
Gentle ping. Beside [PATCH 4/6] (which can be dropped as indicated by Mark)
any concerns regarding reset of these changes here ?
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