linux-kernel - Re: [PATCH v2 2/3] reset: cix: add support for cix sky1 resets

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Message-ID: <5422542a5bc21edeb229006dc6776c590bb74410.camel@pengutronix.de>
Date: Thu, 13 Nov 2025 11:45:04 +0100
From: Philipp Zabel <p.zabel@...gutronix.de>
To: Gary Yang <gary.yang@...tech.com>, robh@...nel.org, krzk+dt@...nel.org, 
	conor+dt@...nel.org
Cc: devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, 
	linux-arm-kernel@...ts.infradead.org, cix-kernel-upstream@...tech.com
Subject: Re: [PATCH v2 2/3] reset: cix: add support for cix sky1 resets

On Do, 2025-11-13 at 15:59 +0800, Gary Yang wrote:
> There are two reset controllers on Cix Sky1 Soc.
> One is located in S0 domain, and the other is located
> in S5 domain.
> 
> Signed-off-by: Gary Yang <gary.yang@...tech.com>
> ---
>  drivers/reset/Kconfig      |   7 +
>  drivers/reset/Makefile     |   1 +
>  drivers/reset/reset-sky1.c | 381 +++++++++++++++++++++++++++++++++++++
>  3 files changed, 389 insertions(+)
>  create mode 100644 drivers/reset/reset-sky1.c
> 
> diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
> index 78b7078478d4..45768cd3b135 100644
> --- a/drivers/reset/Kconfig
> +++ b/drivers/reset/Kconfig
> @@ -278,6 +278,13 @@ config RESET_SIMPLE
>  	   - SiFive FU740 SoCs
>  	   - Sophgo SoCs
>  
> +config RESET_SKY1
> +	bool "Cix Sky1 reset controller"
> +	depends on HAS_IOMEM
> +	depends on ARCH_CIX || COMPILE_TEST
> +	help
> +	  This enables the reset controller for Cix Sky1.
> +
>  config RESET_SOCFPGA
>  	bool "SoCFPGA Reset Driver" if COMPILE_TEST && (!ARM || !ARCH_INTEL_SOCFPGA)
>  	default ARM && ARCH_INTEL_SOCFPGA
> diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
> index f7934f9fb90b..a878ac4a6e4b 100644
> --- a/drivers/reset/Makefile
> +++ b/drivers/reset/Makefile
> @@ -36,6 +36,7 @@ obj-$(CONFIG_RESET_RZG2L_USBPHY_CTRL) += reset-rzg2l-usbphy-ctrl.o
>  obj-$(CONFIG_RESET_RZV2H_USB2PHY) += reset-rzv2h-usb2phy.o
>  obj-$(CONFIG_RESET_SCMI) += reset-scmi.o
>  obj-$(CONFIG_RESET_SIMPLE) += reset-simple.o
> +obj-$(CONFIG_RESET_SKY1) += reset-sky1.o
>  obj-$(CONFIG_RESET_SOCFPGA) += reset-socfpga.o
>  obj-$(CONFIG_RESET_SPACEMIT) += reset-spacemit.o
>  obj-$(CONFIG_RESET_SUNPLUS) += reset-sunplus.o
> diff --git a/drivers/reset/reset-sky1.c b/drivers/reset/reset-sky1.c
> new file mode 100644
> index 000000000000..b9e03e76736a
> --- /dev/null
> +++ b/drivers/reset/reset-sky1.c
> @@ -0,0 +1,381 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + *
> + * CIX System Reset Controller (SRC) driver
> + *
> + * Author: Jerry Zhu <jerry.zhu@...tech.com>
> + */
> +
> +#include <linux/delay.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/of_device.h>
> +#include <linux/platform_device.h>
> +#include <linux/reset-controller.h>
> +#include <linux/regmap.h>
> +
> +#include <dt-bindings/reset/cix,sky1-rst.h>
> +#include <dt-bindings/reset/cix,sky1-rst-fch.h>
> +
> +#define SKY1_RESET_SLEEP_MIN_US		50
> +#define SKY1_RESET_SLEEP_MAX_US		100
> +
> +struct sky1_src_signal {
> +	unsigned int offset, bit;
> +};
> +
> +struct sky1_src_variant {
> +	const struct sky1_src_signal *signals;
> +	unsigned int signals_num;
> +};
> +
> +struct sky1_src {
> +	struct reset_controller_dev rcdev;
> +	struct regmap *regmap;
> +	const struct sky1_src_signal *signals;
> +};
> +
> +enum {
> +	CSU_PM_RESET				= 0x304,
> +	SENSORHUB_RESET				= 0x308,
> +	SENSORHUB_NOC_RESET			= 0x30c,
> +
> +	RESET_GROUP0_S0_DOMAIN_0		= 0x400,
> +	RESET_GROUP0_S0_DOMAIN_1		= 0x404,
> +	RESET_GROUP1_USB_PHYS			= 0x408,
> +	RESET_GROUP1_USB_CONTROLLERS		= 0x40c,
> +
> +	RESET_GROUP0_RCSU			= 0x800,
> +	RESET_GROUP1_RCSU			= 0x804,
> +

Unnecessary empty line.

Please fix this and the other issues reported by

  scripts/checkpatch.pl --strict

regards
Philipp