linux-kernel - Re: [PATCH v4] soc: tegra: fuse: speedo-tegra210: Update speedo ids

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Message-ID: <holicfjdigizvt6abw5lcgs6gadzqcw2qbji2lg4ercbpi4232@btjcye2dukhk>
Date: Fri, 14 Nov 2025 17:19:59 +0100
From: Thierry Reding <thierry.reding@...il.com>
To: webgeek1234@...il.com
Cc: Jonathan Hunter <jonathanh@...dia.com>, Joseph Lo <josephl@...dia.com>, 
	Stephen Boyd <sboyd@...nel.org>, Thierry Reding <treding@...dia.com>, linux-tegra@...r.kernel.org, 
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4] soc: tegra: fuse: speedo-tegra210: Update speedo ids

On Tue, Sep 23, 2025 at 11:58:05AM -0500, Aaron Kling via B4 Relay wrote:
> From: Aaron Kling <webgeek1234@...il.com>
> 
> Existing code only sets cpu and gpu speedo ids 0 and 1. The cpu dvfs
> code supports 11 ids and nouveau supports 5. This aligns with what the
> downstream vendor kernel supports. Align skus with the downstream list.
> 
> The Tegra210 CVB tables were added in the first referenced fixes commit.
> Since then, all Tegra210 socs have tried to scale to 1.9 GHz, when the
> supported devkits are only supposed to scale to 1.5 or 1.7 GHZ.
> Overclocking should not be the default state.
> 
> Fixes: 2b2dbc2f94e5 ("clk: tegra: dfll: add CVB tables for Tegra210")
> Fixes: 579db6e5d9b8 ("arm64: tegra: Enable DFLL support on Jetson Nano")
> Signed-off-by: Aaron Kling <webgeek1234@...il.com>

Applied, thanks.

Thierry

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