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Message-Id: <20251114-mt8196-dvfsrc-v1-3-b956d4631468@collabora.com>
Date: Fri, 14 Nov 2025 17:53:57 +0100
From: Nicolas Frattaroli <nicolas.frattaroli@...labora.com>
To: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Matthias Brugger <matthias.bgg@...il.com>,
AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>,
Henry Chen <henryc.chen@...iatek.com>, Georgi Djakov <djakov@...nel.org>
Cc: kernel@...labora.com, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org, linux-pm@...r.kernel.org,
Nicolas Frattaroli <nicolas.frattaroli@...labora.com>
Subject: [PATCH 03/13] dt-bindings: interconnect: mt8183-emi: Add support
for MT8196 EMI
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
Add a new compatible for the External Memory Interface Interconnect
found on the MediaTek MT8196 Chromebook SoC.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
---
.../bindings/interconnect/mediatek,mt8183-emi.yaml | 1 +
include/dt-bindings/interconnect/mediatek,mt8196.h | 48 ++++++++++++++++++++++
2 files changed, 49 insertions(+)
diff --git a/Documentation/devicetree/bindings/interconnect/mediatek,mt8183-emi.yaml b/Documentation/devicetree/bindings/interconnect/mediatek,mt8183-emi.yaml
index 017c8478b2a7..1fb8ccb558fb 100644
--- a/Documentation/devicetree/bindings/interconnect/mediatek,mt8183-emi.yaml
+++ b/Documentation/devicetree/bindings/interconnect/mediatek,mt8183-emi.yaml
@@ -40,6 +40,7 @@ properties:
enum:
- mediatek,mt8183-emi
- mediatek,mt8195-emi
+ - mediatek,mt8196-emi
'#interconnect-cells':
const: 1
diff --git a/include/dt-bindings/interconnect/mediatek,mt8196.h b/include/dt-bindings/interconnect/mediatek,mt8196.h
new file mode 100644
index 000000000000..de700fa73223
--- /dev/null
+++ b/include/dt-bindings/interconnect/mediatek,mt8196.h
@@ -0,0 +1,48 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
+/*
+ * Copyright (c) 2025 Collabora Ltd.
+ * AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
+ */
+
+#ifndef __DT_BINDINGS_INTERCONNECT_MEDIATEK_MT8196_H
+#define __DT_BINDINGS_INTERCONNECT_MEDIATEK_MT8196_H
+
+#define SLAVE_DDR_EMI 0
+#define MASTER_MCUSYS 1
+#define MASTER_MCU_0 2
+#define MASTER_MCU_1 3
+#define MASTER_MCU_2 4
+#define MASTER_MCU_3 5
+#define MASTER_MCU_4 6
+#define MASTER_GPUSYS 7
+#define MASTER_MMSYS 8
+#define MASTER_MM_VPU 9
+#define MASTER_MM_DISP 10
+#define MASTER_MM_VDEC 11
+#define MASTER_MM_VENC 12
+#define MASTER_MM_CAM 13
+#define MASTER_MM_IMG 14
+#define MASTER_MM_MDP 15
+#define MASTER_VPUSYS 16
+#define MASTER_VPU_0 17
+#define MASTER_VPU_1 18
+#define MASTER_MDLASYS 19
+#define MASTER_MDLA_0 20
+#define MASTER_UFS 21
+#define MASTER_PCIE 22
+#define MASTER_USB 23
+#define MASTER_WIFI 24
+#define MASTER_BT 25
+#define MASTER_NETSYS 26
+#define MASTER_DBGIF 27
+#define SLAVE_HRT_DDR_EMI 28
+#define MASTER_HRT_MMSYS 29
+#define MASTER_HRT_MM_DISP 30
+#define MASTER_HRT_MM_VDEC 31
+#define MASTER_HRT_MM_VENC 32
+#define MASTER_HRT_MM_CAM 33
+#define MASTER_HRT_MM_IMG 34
+#define MASTER_HRT_MM_MDP 35
+#define MASTER_HRT_ADSP 36
+#define MASTER_HRT_DBGIF 37
+#endif
--
2.51.2
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