linux-kernel - Re: [PATCH V1 2/3] dt-bindings: ufs: Document bindings for SA8255P UFS Host Controller

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Message-ID: <p6a5nazgd74fwbo6c3ctgvwifcigwwn4azkiu7nrmovrn5cmqn@nxzryxyx4oao>
Date: Fri, 14 Nov 2025 13:32:08 -0600
From: Bjorn Andersson <andersson@...nel.org>
To: Ram Kumar Dwivedi <ram.dwivedi@....qualcomm.com>
Cc: mani@...nel.org, alim.akhtar@...sung.com, avri.altman@....com, 
	bvanassche@....org, robh@...nel.org, krzk+dt@...nel.org, conor+dt@...nel.org, 
	James.Bottomley@...senpartnership.com, martin.petersen@...cle.com, quic_ahari@...cinc.com, 
	linux-arm-msm@...r.kernel.org, linux-scsi@...r.kernel.org, devicetree@...r.kernel.org, 
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH V1 2/3] dt-bindings: ufs: Document bindings for SA8255P
 UFS Host Controller

On Fri, Nov 14, 2025 at 08:26:45PM +0530, Ram Kumar Dwivedi wrote:
> From: Ram Kumar Dwivedi <quic_rdwivedi@...cinc.com>
> 
> Document the device tree bindings for UFS host controller on
> Qualcomm SA8255P platform which integrates firmware-managed
> resources.
> 
> The platform firmware implements the SCMI server and manages
> resources such as the PHY, clocks, regulators and resets via the
> SCMI power protocol. As a result, the OS-visible DT only describes
> the controller’s MMIO, interrupt, IOMMU and power-domain interfaces.
> 
> The generic "qcom,ufshc" and "jedec,ufs-2.0" compatible strings are
> removed from the binding, since this firmware managed design won't
> be compatible with the drivers doing full resource management.
> 
> Co-developed-by: Anjana Hari <quic_ahari@...cinc.com>
> Signed-off-by: Anjana Hari <quic_ahari@...cinc.com>
> Signed-off-by: Ram Kumar Dwivedi <quic_rdwivedi@...cinc.com>
> ---
>  .../bindings/ufs/qcom,sa8255p-ufshc.yaml      | 63 +++++++++++++++++++
>  1 file changed, 63 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/ufs/qcom,sa8255p-ufshc.yaml
> 
> diff --git a/Documentation/devicetree/bindings/ufs/qcom,sa8255p-ufshc.yaml b/Documentation/devicetree/bindings/ufs/qcom,sa8255p-ufshc.yaml
> new file mode 100644
> index 000000000000..3b31f6282feb
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/ufs/qcom,sa8255p-ufshc.yaml
> @@ -0,0 +1,63 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/ufs/qcom,sa8255p-ufshc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm SA8255P UFS Host Controller
> +
> +maintainers:
> +  - Ram Kumar Dwivedi <ram.dwivedi@....qualcomm.com>
> +  - Anjana Hari <quic_ahari@...cinc.com>

This should be @oss.qualcomm.com, or @qti.qualcomm.com, not
@quicinc.com.

> +
> +properties:
> +  compatible:
> +    const: qcom,sa8255p-ufshc
> +
> +  reg:
> +    maxItems: 1
> +
> +  interrupts:
> +    maxItems: 1
> +
> +  iommus:
> +    maxItems: 1
> +
> +  dma-coherent:
> +    type: boolean
> +
> +  power-domains:
> +    maxItems: 1
> +
> +required:
> +  - compatible
> +  - reg
> +  - interrupts
> +  - power-domains
> +  - iommus
> +  - dma-coherent
> +
> +allOf:
> +  - $ref: ufs-common.yaml
> +
> +unevaluatedProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> +    soc {
> +        #address-cells = <2>;
> +        #size-cells = <2>;
> +
> +        ufshc@...4000 {
> +            compatible = "qcom,sa8255p-ufshc";
> +            reg = <0x0 0x01d84000 0x0 0x3000>;

Drop the two 0x0 and you don't need to change address/size-cells.

Regards,
Bjorn

> +            interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
> +            lanes-per-direction = <2>;
> +
> +            iommus = <&apps_smmu 0x100 0x0>;
> +            power-domains = <&scmi3_pd 0>;
> +            dma-coherent;
> +        };
> +    };
> -- 
> 2.34.1
> 
>