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Message-ID: <aRb4T2vEhKlehJiy@yilunxu-OptiPlex-7050>
Date: Fri, 14 Nov 2025 17:37:19 +0800
From: Xu Yilun <yilun.xu@...ux.intel.com>
To: Krzysztof Kozlowski <krzk@...nel.org>
Cc: Khairul Anuar Romli <khairul.anuar.romli@...era.com>,
Moritz Fischer <mdf@...nel.org>, Xu Yilun <yilun.xu@...el.com>,
Tom Rix <trix@...hat.com>, Dinh Nguyen <dinguyen@...nel.org>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Mahesh Rao <mahesh.rao@...era.com>,
Ho Yin <adrian.ho.yin.ng@...era.com>,
Niravkumar L Rabara <nirav.rabara@...era.com>,
linux-fpga@...r.kernel.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org
Subject: Re: [PATCH v2 2/2] arm64: dts: agilex5: add fpga-region and fpga-mgr
nodes
On Thu, Nov 13, 2025 at 08:12:24AM +0100, Krzysztof Kozlowski wrote:
> On 13/11/2025 06:55, Xu Yilun wrote:
> > On Thu, Nov 13, 2025 at 12:43:56PM +0800, Khairul Anuar Romli wrote:
> >> The Intel Agilex 5 SoC contains a programmable FPGA region that requires
> >> proper device tree description to enable FPGA manager support in the Linux
> >> kernel. Without the 'fpga-region' and 'fpga-mgr' nodes, the kernel cannot
> >> detect or manage the FPGA hardware correctly.
> >>
> >> This patch adds a 'fpga-region' node with compatible = "fpga-region", along
> >> with appropriate #address-cells and #size-cells properties, to describe the
> >> FPGA region layout.
> >>
> >> Also defines specific compatible string for Agilex5 and add Agilex string
> >> as fallback for stratix10-soc driver initialization.
> >>
> >> Signed-off-by: Khairul Anuar Romli <khairul.anuar.romli@...era.com>
> >
> > Reviewed-by: Xu Yilun <yilun.xu@...el.com>
>
> How this can be reviewed if it is completely wrong and obviously not
> matching the bindings from this patchset?
I apologize. Obviously I didn't pay enough effort on DT. Thanks for
pointing out and providing the Doc.
>
> Best regards,
> Krzysztof
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