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Message-ID: <176312378412.498.16967122427223509290.tip-bot2@tip-bot2>
Date: Fri, 14 Nov 2025 12:36:24 -0000
From: "tip-bot2 for Mario Limonciello" <tip-bot2@...utronix.de>
To: linux-tip-commits@...r.kernel.org
Cc: Mario Limonciello <mario.limonciello@....com>,
 "Borislav Petkov (AMD)" <bp@...en8.de>,  <stable@...nel.org>, x86@...nel.org,
 linux-kernel@...r.kernel.org
Subject: [tip: x86/urgent] x86/CPU/AMD: Add additional fixed RDSEED microcode
 revisions

The following commit has been merged into the x86/urgent branch of tip:

Commit-ID:     e1a97a627cd01d73fac5dd054d8f3de601ef2781
Gitweb:        https://git.kernel.org/tip/e1a97a627cd01d73fac5dd054d8f3de601ef2781
Author:        Mario Limonciello <mario.limonciello@....com>
AuthorDate:    Thu, 13 Nov 2025 16:35:50 -06:00
Committer:     Borislav Petkov (AMD) <bp@...en8.de>
CommitterDate: Fri, 14 Nov 2025 13:02:11 +01:00

x86/CPU/AMD: Add additional fixed RDSEED microcode revisions

Microcode that resolves the RDSEED failure (SB-7055 [1]) has been released for
additional Zen5 models to linux-firmware [2]. Update the zen5_rdseed_microcode
array to cover these new models.

Fixes: 607b9fb2ce24 ("x86/CPU/AMD: Add RDSEED fix for Zen5")
Signed-off-by: Mario Limonciello <mario.limonciello@....com>
Signed-off-by: Borislav Petkov (AMD) <bp@...en8.de>
Cc: <stable@...nel.org>
Link: https://www.amd.com/en/resources/product-security/bulletin/amd-sb-7055.html [1]
Link: https://gitlab.com/kernel-firmware/linux-firmware/-/commit/6167e5566900cf236f7a69704e8f4c441bc7212a [2]
Link: https://patch.msgid.link/20251113223608.1495655-1-mario.limonciello@amd.com
---
 arch/x86/kernel/cpu/amd.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index 2ba9f2d..5d46709 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -1037,7 +1037,14 @@ static void init_amd_zen4(struct cpuinfo_x86 *c)
 
 static const struct x86_cpu_id zen5_rdseed_microcode[] = {
 	ZEN_MODEL_STEP_UCODE(0x1a, 0x02, 0x1, 0x0b00215a),
+	ZEN_MODEL_STEP_UCODE(0x1a, 0x08, 0x1, 0x0b008121),
 	ZEN_MODEL_STEP_UCODE(0x1a, 0x11, 0x0, 0x0b101054),
+	ZEN_MODEL_STEP_UCODE(0x1a, 0x24, 0x0, 0x0b204037),
+	ZEN_MODEL_STEP_UCODE(0x1a, 0x44, 0x0, 0x0b404035),
+	ZEN_MODEL_STEP_UCODE(0x1a, 0x44, 0x1, 0x0b404108),
+	ZEN_MODEL_STEP_UCODE(0x1a, 0x60, 0x0, 0x0b600037),
+	ZEN_MODEL_STEP_UCODE(0x1a, 0x68, 0x0, 0x0b608038),
+	ZEN_MODEL_STEP_UCODE(0x1a, 0x70, 0x0, 0x0b700037),
 	{},
 };
 

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