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Message-ID: <CAF6AEGt=qUeEcNbyETriZLnpwt+Zg7K2N7SUsc4Riu5z54VaoQ@mail.gmail.com>
Date: Fri, 14 Nov 2025 17:09:47 -0800
From: Rob Clark <robdclark@...il.com>
To: Akhil P Oommen <akhilpo@....qualcomm.com>
Cc: Rob Clark <robin.clark@....qualcomm.com>, Bjorn Andersson <andersson@...nel.org>, 
	Konrad Dybcio <konradybcio@...nel.org>, Sean Paul <sean@...rly.run>, 
	Dmitry Baryshkov <lumag@...nel.org>, Abhinav Kumar <abhinav.kumar@...ux.dev>, 
	Jessica Zhang <jesszhan0024@...il.com>, Marijn Suijten <marijn.suijten@...ainline.org>, 
	David Airlie <airlied@...il.com>, Simona Vetter <simona@...ll.ch>, Jonathan Marek <jonathan@...ek.ca>, 
	Jordan Crouse <jordan@...micpenguin.net>, Will Deacon <will@...nel.org>, 
	Robin Murphy <robin.murphy@....com>, Joerg Roedel <joro@...tes.org>, Rob Herring <robh@...nel.org>, 
	Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, 
	Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>, Maxime Ripard <mripard@...nel.org>, 
	Thomas Zimmermann <tzimmermann@...e.de>, Connor Abbott <cwabbott0@...il.com>, linux-arm-msm@...r.kernel.org, 
	linux-kernel@...r.kernel.org, dri-devel@...ts.freedesktop.org, 
	freedreno@...ts.freedesktop.org, linux-arm-kernel@...ts.infradead.org, 
	iommu@...ts.linux.dev, devicetree@...r.kernel.org, 
	Konrad Dybcio <konrad.dybcio@....qualcomm.com>, Rob Clark <rob.clark@....qualcomm.com>, 
	Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>, Krzysztof Kozlowski <krzk@...nel.org>
Subject: Re: [PATCH v3 00/20] drm/msm/adreno: Introduce Adreno 8xx family support

On Thu, Nov 13, 2025 at 3:29 PM Akhil P Oommen <akhilpo@....qualcomm.com> wrote:
>
> This series adds the A8xx HWL along with Adreno 840 GPU support to the
> drm-msm driver. A8x is the next generation in the Adreno family,
> featuring a significant hardware design change. A major update to the
> design is the introduction of 'Slice' architecture. Slices are sort of
> mini-GPUs within the GPU which are more independent in processing Graphics
> and compute workloads. Also, in addition to the BV and BR pipe we saw in
> A7x, CP has more concurrency with additional pipes.
>
> From KMD-HW SWI perspective, there is significant register shuffling in
> some of the blocks. For slice or aperture related registers which are
> virtualized now, KMD/crashdumper has to configure an aperture register
> to access them. On the GMU front, there are some shuffling in register
> offsets, but it is manageable as of now. There is a new HFI message to
> transfer data tables and new power related features to support higher
> peak currents and thermal mitigations.
>
> Adreno 840 GPU is the second generation architecture in the A8x family
> present in Kaanapali (a.k.a Snapdragon 8 Elite Gen 5) chipset [1]. It
> has a maximum of 3 slices with 2 SPs per slice. Along with the 3-slice
> configuration, there is also another 2-slice SKU (Partial Slice SKU).
> A840 GPU has a bigger 18MB of GMEM which can be utilized for graphics
> and compute workload. It also features improved Concurrent binning
> support, UBWC v6 etc.
>
> Adreno X2-85 GPU present in Glymur chipset is very similar to A840
> architecturally. So adding initial support for it requires just an
> additional entry in the catalog with the necessary register lists.
>
> This series adds only the driver side support along with a few dt bindings
> updates. Devicetree patches will be sent separately, but those who
> are interested can take look at it from the Qualcomm's public tree [2].
> Features like coredump, gmu power features, ifpc, preemption etc will be
> added in a future series.
>
> Initial few patches are for improving code sharing between a6xx/a7xx and
> a8x routines. Then there is a patch to rebase GMU register offsets from
> GPU's base. Rest of the patches add A8x HWL and Adreno 840/X2-85 GPU
> support.
>
> Mesa support for A8x/A840 GPU is WIP and will be posted in the near
> future.

mesa support: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38450

BR,
-R

> [1] https://www.qualcomm.com/products/mobile/snapdragon/smartphones/snapdragon-8-series-mobile-platforms/snapdragon-8-elite-gen-5
> [2] https://git.codelinaro.org/clo/linux-kernel/kernel-qcom/-/commit/5fb72c27909d56660db6afe8e3e08a09bd83a284
>
> Signed-off-by: Akhil P Oommen <akhilpo@....qualcomm.com>
> ---
> Changes in v3:
> - Squash gpu smmu bindings patches for Kaana and Glymur (Krzysztof)
> - Reuse a6xx_flush() and drop the patch that added submit_flush callback
> - Fix GBIF configs for a640 and a650 family (Konrad)
> - Add partial SKU detection support
> - Correct Chipids in the catalog
> - Add a new patch to drop SCRATCH reg dumps (Rob)
> - Read slice info right after CX gdsc is up
> - Don't drop raytracing support if preemption is unsupported
> - Drop the unused A840 pwrup list (Konrad)
> - Updates to A840 nonctxt list (Rob)
> - Capture trailers
> - Link to v2: https://lore.kernel.org/r/20251110-kaana-gpu-support-v2-0-bef18acd5e94@oss.qualcomm.com
>
> Changes in v2:
> - Rebase on top of next-20251110 tag
> - Include support for Glymur chipset
> - Drop the ubwc_config driver patch as it is picked up
> - Sync the latest a6xx register definitions from Rob's tree
> - New patch to do LRZ flush to fix pagefaults
> - Reuse a7xx_cx_mem_init(). Dropped related patch (Connor)
> - Few changes around cp protect configuration to align it with downstream
> - Fix the incorrect register usage at few places
> - Updates to non-ctxt register list
> - Serialize aperture updates (Rob)
> - More helpful cp error irq logging
> - Split A8x GMU support patch (Dmitry)
> - Use devm_platform_get_and_ioremap_resource in GMU init (Konrad)
> - Link to v1: https://lore.kernel.org/r/20250930-kaana-gpu-support-v1-0-73530b0700ed@oss.qualcomm.com
>
> ---
> Akhil P Oommen (20):
>       drm/msm/a6xx: Flush LRZ cache before PT switch
>       drm/msm/a6xx: Fix the gemnoc workaround
>       drm/msm/a6xx: Skip dumping SCRATCH registers
>       drm/msm/adreno: Common-ize PIPE definitions
>       drm/msm/adreno: Move adreno_gpu_func to catalogue
>       drm/msm/adreno: Move gbif_halt() to adreno_gpu_func
>       drm/msm/adreno: Add MMU fault handler to adreno_gpu_func
>       drm/msm/a6xx: Sync latest register definitions
>       drm/msm/a6xx: Rebase GMU register offsets
>       drm/msm/a8xx: Add support for A8x GMU
>       drm/msm/a6xx: Improve MX rail fallback in RPMH vote init
>       drm/msm/a6xx: Share dependency vote table with GMU
>       drm/msm/adreno: Introduce A8x GPU Support
>       drm/msm/adreno: Support AQE engine
>       drm/msm/a8xx: Add support for Adreno 840 GPU
>       drm/msm/adreno: Do CX GBIF config before GMU start
>       drm/msm/a8xx: Add support for Adreno X2-85 GPU
>       dt-bindings: arm-smmu: Add Kaanapali and Glymur GPU SMMU
>       dt-bindings: display/msm/gmu: Add Adreno 840 GMU
>       dt-bindings: display/msm/gmu: Add Adreno X2-85 GMU
>
>  .../devicetree/bindings/display/msm/gmu.yaml       |   60 +-
>  .../devicetree/bindings/iommu/arm,smmu.yaml        |    2 +
>  drivers/gpu/drm/msm/Makefile                       |    2 +
>  drivers/gpu/drm/msm/adreno/a2xx_catalog.c          |    7 +-
>  drivers/gpu/drm/msm/adreno/a2xx_gpu.c              |   50 +-
>  drivers/gpu/drm/msm/adreno/a2xx_gpu.h              |    2 +
>  drivers/gpu/drm/msm/adreno/a3xx_catalog.c          |   13 +-
>  drivers/gpu/drm/msm/adreno/a3xx_gpu.c              |   52 +-
>  drivers/gpu/drm/msm/adreno/a3xx_gpu.h              |    2 +
>  drivers/gpu/drm/msm/adreno/a4xx_catalog.c          |    7 +-
>  drivers/gpu/drm/msm/adreno/a4xx_gpu.c              |   54 +-
>  drivers/gpu/drm/msm/adreno/a4xx_gpu.h              |    2 +
>  drivers/gpu/drm/msm/adreno/a5xx_catalog.c          |   17 +-
>  drivers/gpu/drm/msm/adreno/a5xx_gpu.c              |   61 +-
>  drivers/gpu/drm/msm/adreno/a5xx_gpu.h              |    1 +
>  drivers/gpu/drm/msm/adreno/a6xx_catalog.c          |  369 +++-
>  drivers/gpu/drm/msm/adreno/a6xx_gmu.c              |  287 ++-
>  drivers/gpu/drm/msm/adreno/a6xx_gmu.h              |   25 +-
>  drivers/gpu/drm/msm/adreno/a6xx_gpu.c              |  393 ++--
>  drivers/gpu/drm/msm/adreno/a6xx_gpu.h              |   31 +-
>  drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h        |   18 +-
>  drivers/gpu/drm/msm/adreno/a6xx_hfi.c              |   53 +
>  drivers/gpu/drm/msm/adreno/a6xx_hfi.h              |   17 +
>  drivers/gpu/drm/msm/adreno/a8xx_gpu.c              | 1205 ++++++++++++
>  drivers/gpu/drm/msm/adreno/adreno_device.c         |    4 +-
>  .../gpu/drm/msm/adreno/adreno_gen7_0_0_snapshot.h  |  420 ++---
>  .../gpu/drm/msm/adreno/adreno_gen7_2_0_snapshot.h  |  332 ++--
>  .../gpu/drm/msm/adreno/adreno_gen7_9_0_snapshot.h  |  470 ++---
>  drivers/gpu/drm/msm/adreno/adreno_gpu.h            |   38 +-
>  drivers/gpu/drm/msm/registers/adreno/a6xx.xml      | 1954 +++++++++++++++-----
>  .../gpu/drm/msm/registers/adreno/a6xx_enums.xml    |    2 +-
>  drivers/gpu/drm/msm/registers/adreno/a6xx_gmu.xml  |  283 +--
>  .../gpu/drm/msm/registers/adreno/a7xx_enums.xml    |    7 -
>  .../drm/msm/registers/adreno/a8xx_descriptors.xml  |  120 ++
>  .../gpu/drm/msm/registers/adreno/a8xx_enums.xml    |  289 +++
>  .../gpu/drm/msm/registers/adreno/adreno_common.xml |   12 +
>  36 files changed, 5008 insertions(+), 1653 deletions(-)
> ---
> base-commit: edf57d8dafc63f9298a209e518ea6a2e0df78ed0
> change-id: 20250929-kaana-gpu-support-11d21c8fa1dc
>
> Best regards,
> --
> Akhil P Oommen <akhilpo@....qualcomm.com>
>

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