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Message-ID: <20251116180500.GCaRoSTLkTf8q5bWFv@fat_crate.local>
Date: Sun, 16 Nov 2025 19:05:00 +0100
From: Borislav Petkov <bp@...en8.de>
To: Avadhut Naik <avadhut.naik@....com>
Cc: x86@...nel.org, linux-edac@...r.kernel.org, tony.luck@...el.com,
yazen.ghannam@....com, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] x86/mce: Add support for PHYSADDRV and
PHYSADDRVALIDSUPPORTED bits
On Fri, Nov 14, 2025 at 08:20:20PM +0000, Avadhut Naik wrote:
> diff --git a/arch/x86/kernel/cpu/mce/amd.c b/arch/x86/kernel/cpu/mce/amd.c
> index 53385e6aa230..c6be2f520476 100644
> --- a/arch/x86/kernel/cpu/mce/amd.c
> +++ b/arch/x86/kernel/cpu/mce/amd.c
> @@ -87,6 +87,7 @@ struct smca_bank {
> const struct smca_hwid *hwid;
> u32 id; /* Value of MCA_IPID[InstanceId]. */
> u8 sysfs_id; /* Value used for sysfs name. */
> + bool paddrv_support; /* Physical Address Valid bit in MCA_CONFIG */
u64 paddrv : 1,
__reserved : 63;
Otherwise, yes.
Thx.
--
Regards/Gruss,
Boris.
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