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Message-ID: <20251117-depth-sage-ee0829c71c25@spud>
Date: Mon, 17 Nov 2025 15:35:20 +0000
From: Conor Dooley <conor@...nel.org>
To: linux-kernel@...r.kernel.org
Cc: conor@...nel.org,
Conor Dooley <conor.dooley@...rochip.com>,
Daire McNamara <daire.mcnamara@...rochip.com>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
linux-riscv@...ts.infradead.org,
linux-clk@...r.kernel.org,
devicetree@...r.kernel.org,
Claudiu Beznea <claudiu.beznea@...on.dev>,
Pierre-Henry Moussay <pierre-henry.moussay@...rochip.com>
Subject: [PATCH v1 3/3] dt-bindings: clock: mpfs-clkcfg: Add pic64gx compatibility
From: Pierre-Henry Moussay <pierre-henry.moussay@...rochip.com>
pic64gx has a clock controller compatible with mpfs-clkcfg. Don't permit
the deprecated configuration that was never supported for this SoC.
Signed-off-by: Pierre-Henry Moussay <pierre-henry.moussay@...rochip.com>
Co-developed-by: Conor Dooley <conor.dooley@...rochip.com>
Signed-off-by: Conor Dooley <conor.dooley@...rochip.com>
---
.../bindings/clock/microchip,mpfs-clkcfg.yaml | 15 ++++++++++++++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/clock/microchip,mpfs-clkcfg.yaml b/Documentation/devicetree/bindings/clock/microchip,mpfs-clkcfg.yaml
index ee4f31596d97..f111bed16f15 100644
--- a/Documentation/devicetree/bindings/clock/microchip,mpfs-clkcfg.yaml
+++ b/Documentation/devicetree/bindings/clock/microchip,mpfs-clkcfg.yaml
@@ -19,7 +19,11 @@ description: |
properties:
compatible:
- const: microchip,mpfs-clkcfg
+ oneOf:
+ - items:
+ - const: microchip,pic64gx-clkcfg
+ - const: microchip,mpfs-clkcfg
+ - const: microchip,mpfs-clkcfg
reg:
oneOf:
@@ -69,6 +73,15 @@ required:
- clocks
- '#clock-cells'
+if:
+ properties:
+ compatible:
+ contains:
+ const: microchip,pic64gx-clkcfg
+then:
+ reg:
+ maxItems: 1
+
additionalProperties: false
examples:
--
2.51.0
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