linux-kernel - Re: [PATCH v4] arm64: errata: Work around AmpereOne's erratum AC04_CPU

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Message-ID: <86bjl0o9yd.fsf@scott-ph-mail.amperecomputing.com>
Date: Mon, 17 Nov 2025 09:17:14 -0800
From: D Scott Phillips <scott@...amperecomputing.com>
To: Jaikiran Pai <jai.forums2013@...il.com>, Catalin Marinas
 <catalin.marinas@....com>, James Clark <james.clark@...aro.org>, James
 Morse <james.morse@....com>, Joey Gouly <joey.gouly@....com>, Kevin
 Brodsky <kevin.brodsky@....com>, Marc Zyngier <maz@...nel.org>, Mark Brown
 <broonie@...nel.org>, Mark Rutland <mark.rutland@....com>, Oliver Upton
 <oliver.upton@...ux.dev>, "Rob Herring (Arm)" <robh@...nel.org>, Shameer
 Kolothum <shameerali.kolothum.thodi@...wei.com>, Shiqi Liu
 <shiqiliu@...t.edu.cn>, Will Deacon <will@...nel.org>, Yicong Yang
 <yangyicong@...ilicon.com>, kvmarm@...ts.linux.dev,
 linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4] arm64: errata: Work around AmpereOne's erratum
 AC04_CPU_23

Jaikiran Pai <jai.forums2013@...il.com> writes:

> Hello Scott,
>
> On 14/05/25 12:15 am, D Scott Phillips wrote:
>> On AmpereOne AC04, updates to HCR_EL2 can rarely corrupt simultaneous
>> translations for data addresses initiated by load/store instructions.
>> Only instruction initiated translations are vulnerable, not translations
>> from prefetches for example. A DSB before the store to HCR_EL2 is
>> sufficient to prevent older instructions from hitting the window for
>> corruption, and an ISB after is sufficient to prevent younger
>> instructions from hitting the window for corruption.
>
> I see that this patch enables the workaround only for AmpereOne AC04 
> systems. Do you happen to know if the underlying issue for which this 
> patch was introduced, impacts (or can impact) AmpereOne AC03 systems too:

Hi Jaikiran, this issue impacts ac04 only, it is not present on ac03.