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Message-ID: <20251117181023.482138-1-linux.amoon@gmail.com>
Date: Mon, 17 Nov 2025 23:40:08 +0530
From: Anand Moon <linux.amoon@...il.com>
To: Shawn Lin <shawn.lin@...k-chips.com>,
Lorenzo Pieralisi <lpieralisi@...nel.org>,
Krzysztof WilczyĆski <kwilczynski@...nel.org>,
Manivannan Sadhasivam <mani@...nel.org>,
Rob Herring <robh@...nel.org>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Heiko Stuebner <heiko@...ech.de>,
linux-pci@...r.kernel.org (open list:PCIE DRIVER FOR ROCKCHIP),
linux-rockchip@...ts.infradead.org (open list:PCIE DRIVER FOR ROCKCHIP),
linux-arm-kernel@...ts.infradead.org (moderated list:ARM/Rockchip SoC support),
linux-kernel@...r.kernel.org (open list)
Cc: Anand Moon <linux.amoon@...il.com>
Subject: [RFC v1 0/5] Fix some register offset as per RK3399 TRM part 2
In order to enable ASPM we need to fix the register offset as
RK3399 TRM part 2 - PCIe Controller.
Tested on Radxa Rock Pi 4b.
Thanks
-Anand
Anand Moon (5):
PCI: rockchip: Fix Link Control register offset and enable ASPM/CLKREQ
PCI: rockchip: Fix Device Control register offset for Max payload size
PCI: rockchip: Fix Slot Capability Register offset for slot power
limit
PCI: rockchip: Fix Link Control and Status Register 2 for target link
speed
PCI: rockchip: Fix Linkwidth Control Register offset for Retrain Link
drivers/pci/controller/pcie-rockchip-host.c | 31 +++++++++++----------
drivers/pci/controller/pcie-rockchip.h | 5 ++++
2 files changed, 21 insertions(+), 15 deletions(-)
base-commit: e7c375b181600caf135cfd03eadbc45eb530f2cb
--
2.50.1
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