| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID: <CADnq5_POzLjMetvQAW6gi8Emp5OM-VyrVmKGJ5t5w2S=5POjxw@mail.gmail.com>
Date: Mon, 17 Nov 2025 14:43:32 -0500
From: Alex Deucher <alexdeucher@...il.com>
To: "Yo-Jung Leo Lin (AMD)" <Leo.Lin@....com>
Cc: Alex Deucher <alexander.deucher@....com>,
Christian König <christian.koenig@....com>,
David Airlie <airlied@...il.com>, Simona Vetter <simona@...ll.ch>,
Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>, Maxime Ripard <mripard@...nel.org>,
Thomas Zimmermann <tzimmermann@...e.de>, Jonathan Corbet <corbet@....net>, amd-gfx@...ts.freedesktop.org,
dri-devel@...ts.freedesktop.org, linux-kernel@...r.kernel.org,
linux-doc@...r.kernel.org, "Tsao, Anson" <anson.tsao@....com>,
"Mario Limonciello (AMD) (kernel.org)" <superm1@...nel.org>
Subject: Re: [PATCH v2 2/5] drm/amdgpu: add helper to read UMA carveout info
On Fri, Nov 14, 2025 at 3:52 AM Yo-Jung Leo Lin (AMD) <Leo.Lin@....com> wrote:
>
> Currently, the available UMA allocation configs in the integrated system
> information table have not been parsed. Add a helper function to retrieve
> and store these configs.
>
> Co-developed-by: Mario Limonciello (AMD) <superm1@...nel.org>
> Signed-off-by: Mario Limonciello (AMD) <superm1@...nel.org>
> Signed-off-by: Yo-Jung Leo Lin (AMD) <Leo.Lin@....com>
Reviewed-by: Alex Deucher <alexander.deucher@....com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu.h | 32 +++++++++++
> drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c | 2 +
> drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c | 73 ++++++++++++++++++++++++
> drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h | 2 +
> 4 files changed, 109 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index a5574e84694b..2c1123291577 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -1675,6 +1675,38 @@ struct amdgpu_numa_info {
> int nid;
> };
>
> +#define MAX_UMA_OPTION_NAME 28
> +#define MAX_UMA_OPTION_ENTRIES 19
> +
> +#define AMDGPU_UMA_FLAG_AUTO BIT(1)
> +#define AMDGPU_UMA_FLAG_CUSTOM BIT(0)
> +
> +/**
> + * struct amdgpu_uma_carveut_option - single UMA carveout option
> + * @name: Name of the carveout option
> + * @memory_carved: Amount of memory carved
> + * @flags: ATCS flags supported by this option
> + */
> +struct amdgpu_uma_carveout_option {
> + char name[MAX_UMA_OPTION_NAME];
> + uint8_t memory_carved;
> + uint8_t flags;
> +};
> +
> +/**
> + * struct amdgpu_uma_carveut_info - table of available UMA carveout options
> + * @num_entries: Number of available options
> + * @uma_option_index: The index of the option currently applied
> + * @update_lock: Lock to serialize changes to the option
> + * @entries: The array of carveout options
> + */
> +struct amdgpu_uma_carveout_info {
> + uint8_t num_entries;
> + uint8_t uma_option_index;
> + struct mutex update_lock;
> + struct amdgpu_uma_carveout_option entries[MAX_UMA_OPTION_ENTRIES];
> +};
> +
> /* ATCS Device/Driver State */
> #define AMDGPU_ATCS_PSC_DEV_STATE_D0 0
> #define AMDGPU_ATCS_PSC_DEV_STATE_D3_HOT 3
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
> index 0743fd8620e4..d442dc442d34 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
> @@ -38,6 +38,7 @@
> #include "amdgpu_display.h"
> #include "amd_acpi.h"
> #include "atom.h"
> +#include "amdgpu_atomfirmware.h"
>
> /* Declare GUID for AMD _DSM method for XCCs */
> static const guid_t amd_xcc_dsm_guid = GUID_INIT(0x8267f5d5, 0xa556, 0x44f2,
> @@ -125,6 +126,7 @@ struct amdgpu_atcs {
> acpi_handle handle;
>
> struct amdgpu_atcs_functions functions;
> + struct amdgpu_uma_carveout_info uma_info;
> };
>
> static struct amdgpu_acpi_priv {
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
> index 636385c80f64..b1463bb594aa 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
> @@ -296,6 +296,79 @@ static int convert_atom_mem_type_to_vram_type(struct amdgpu_device *adev,
> return vram_type;
> }
>
> +static int amdgpu_atomfirmware_get_uma_carveout_info_v2_3(struct amdgpu_device *adev,
> + union igp_info *igp_info,
> + struct amdgpu_uma_carveout_info *uma_info)
> +{
> + struct uma_carveout_option *opts;
> + uint8_t nr_uma_options;
> + int i;
> +
> + nr_uma_options = igp_info->v23.UMACarveoutIndexMax;
> +
> + if (!nr_uma_options)
> + return -ENODEV;
> +
> + if (nr_uma_options > MAX_UMA_OPTION_ENTRIES) {
> + drm_dbg(adev_to_drm(adev),
> + "Number of UMA options exceeds max table size. Options will not be parsed");
> + return -EINVAL;
> + }
> +
> + uma_info->num_entries = nr_uma_options;
> + uma_info->uma_option_index = igp_info->v23.UMACarveoutIndex;
> +
> + opts = igp_info->v23.UMASizeControlOption;
> +
> + for (i = 0; i < nr_uma_options; i++) {
> + uma_info->entries[i].memory_carved = opts[i].memoryCarvedGb;
> + uma_info->entries[i].flags = opts[i].uma_carveout_option_flags.all8;
> + strscpy(uma_info->entries[i].name, opts[i].optionName, MAX_UMA_OPTION_NAME);
> + }
> +
> + return 0;
> +}
> +
> +int amdgpu_atomfirmware_get_uma_carveout_info(struct amdgpu_device *adev,
> + struct amdgpu_uma_carveout_info *uma_info)
> +{
> + struct amdgpu_mode_info *mode_info = &adev->mode_info;
> + union igp_info *igp_info;
> + u16 data_offset, size;
> + u8 frev, crev;
> + int index;
> +
> + if (!(adev->flags & AMD_IS_APU))
> + return -ENODEV;
> +
> + index = get_index_into_master_table(atom_master_list_of_data_tables_v2_1,
> + integratedsysteminfo);
> +
> + if (!amdgpu_atom_parse_data_header(mode_info->atom_context,
> + index, &size,
> + &frev, &crev, &data_offset)) {
> + return -EINVAL;
> + }
> +
> + igp_info = (union igp_info *)
> + (mode_info->atom_context->bios + data_offset);
> +
> + switch (frev) {
> + case 2:
> + switch (crev) {
> + case 3:
> + return amdgpu_atomfirmware_get_uma_carveout_info_v2_3(adev, igp_info, uma_info);
> + break;
> + default:
> + break;
> + }
> + break;
> + default:
> + break;
> + }
> + return -ENODEV;
> +}
> +
> int
> amdgpu_atomfirmware_get_vram_info(struct amdgpu_device *adev,
> int *vram_width, int *vram_type,
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h
> index 649b5530d8ae..67c8d105729b 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h
> @@ -32,6 +32,8 @@ void amdgpu_atomfirmware_scratch_regs_init(struct amdgpu_device *adev);
> int amdgpu_atomfirmware_allocate_fb_scratch(struct amdgpu_device *adev);
> int amdgpu_atomfirmware_get_vram_info(struct amdgpu_device *adev,
> int *vram_width, int *vram_type, int *vram_vendor);
> +int amdgpu_atomfirmware_get_uma_carveout_info(struct amdgpu_device *adev,
> + struct amdgpu_uma_carveout_info *uma_info);
> int amdgpu_atomfirmware_get_clock_info(struct amdgpu_device *adev);
> int amdgpu_atomfirmware_get_gfx_info(struct amdgpu_device *adev);
> bool amdgpu_atomfirmware_mem_ecc_supported(struct amdgpu_device *adev);
>
> --
> 2.43.0
>
Powered by blists - more mailing lists