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Message-ID: <176341608757.773703.18386473879112962175.robh@kernel.org>
Date: Mon, 17 Nov 2025 15:48:08 -0600
From: "Rob Herring (Arm)" <robh@...nel.org>
To: Conor Dooley <conor@...nel.org>
Cc: linux-clk@...r.kernel.org, Claudiu Beznea <claudiu.beznea@...on.dev>,
devicetree@...r.kernel.org,
Pierre-Henry Moussay <pierre-henry.moussay@...rochip.com>,
Conor Dooley <conor.dooley@...rochip.com>,
linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Daire McNamara <daire.mcnamara@...rochip.com>,
Krzysztof Kozlowski <krzk+dt@...nel.org>
Subject: Re: [PATCH v1 2/3] dt-bindings: clock: mpfs-ccc: Add pic64gx
compatibility
On Mon, 17 Nov 2025 15:35:19 +0000, Conor Dooley wrote:
> From: Pierre-Henry Moussay <pierre-henry.moussay@...rochip.com>
>
> pic64gx SoC Clock Conditioning Circuitry is compatibles
> with the Polarfire SoC
>
> Signed-off-by: Pierre-Henry Moussay <pierre-henry.moussay@...rochip.com>
> Acked-by: Conor Dooley <conor.dooley@...rochip.com>
> Signed-off-by: Conor Dooley <conor.dooley@...rochip.com>
> ---
> .../devicetree/bindings/clock/microchip,mpfs-ccc.yaml | 6 +++++-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
Acked-by: Rob Herring (Arm) <robh@...nel.org>
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