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Message-Id: <20251117-soc-info-s6-s7-s7d-v1-3-6ab8aab03dce@amlogic.com>
Date: Mon, 17 Nov 2025 18:17:02 +0800
From: Xianwei Zhao via B4 Relay <devnull+xianwei.zhao.amlogic.com@...nel.org>
To: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Neil Armstrong <neil.armstrong@...aro.org>,
Kevin Hilman <khilman@...libre.com>, Jerome Brunet <jbrunet@...libre.com>,
Martin Blumenstingl <martin.blumenstingl@...glemail.com>
Cc: devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-amlogic@...ts.infradead.org, linux-kernel@...r.kernel.org,
Xianwei Zhao <xianwei.zhao@...ogic.com>
Subject: [PATCH 3/5] arm64: dts: amlogic: s6: add ao secure node
From: Xianwei Zhao <xianwei.zhao@...ogic.com>
Add node for board info registers, which allows getting SoC family and
board revision.
Signed-off-by: Xianwei Zhao <xianwei.zhao@...ogic.com>
---
arch/arm64/boot/dts/amlogic/amlogic-s6.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/amlogic-s6.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-s6.dtsi
index 0dca64a2ef9e..da3e607aea85 100644
--- a/arch/arm64/boot/dts/amlogic/amlogic-s6.dtsi
+++ b/arch/arm64/boot/dts/amlogic/amlogic-s6.dtsi
@@ -199,6 +199,14 @@ gpiocc: gpio@300 {
gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_CC<<8) 2>;
};
};
+
+ ao-secure@...20 {
+ compatible = "amlogic,s6-ao-secure",
+ "amlogic,meson-gx-ao-secure",
+ "syscon";
+ reg = <0x0 0x10220 0x0 0x140>;
+ amlogic,has-chip-id;
+ };
};
};
};
--
2.37.1
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