linux-kernel - Re: [PATCH RESEND 2/2] drm/msm/dpu: use full scale alpha in _dpu_crtc_setup_blend

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Message-ID: <5c2e47f0-ba96-4433-b13e-9e819cfe2204@oss.qualcomm.com>
Date: Tue, 18 Nov 2025 16:02:03 +0100
From: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
To: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>,
        Rob Clark <robin.clark@....qualcomm.com>,
        Dmitry Baryshkov
 <lumag@...nel.org>,
        Abhinav Kumar <abhinav.kumar@...ux.dev>,
        Jessica Zhang <jessica.zhang@....qualcomm.com>,
        Sean Paul <sean@...rly.run>,
        Marijn Suijten <marijn.suijten@...ainline.org>,
        David Airlie <airlied@...il.com>, Simona Vetter <simona@...ll.ch>
Cc: linux-arm-msm@...r.kernel.org, dri-devel@...ts.freedesktop.org,
        freedreno@...ts.freedesktop.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH RESEND 2/2] drm/msm/dpu: use full scale alpha in
 _dpu_crtc_setup_blend_cfg()

On 11/18/25 3:51 PM, Dmitry Baryshkov wrote:
> Both _dpu_crtc_setup_blend_cfg() and setup_blend_config_alpha()
> callbacks embed knowledge about platform's alpha range (8-bit or
> 10-bit). Make _dpu_crtc_setup_blend_cfg() use full 16-bit values for
> alpha and reduce alpha only in DPU-specific callbacks.
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
> ---

[...]

> -	const_alpha = (bg_alpha & 0xFF) | ((fg_alpha & 0xFF) << 16);
> +	const_alpha = ((bg_alpha >> 8) & 0xff) |
> +		(((fg_alpha >> 8) & 0xff) << 16);

This begs for some bitfield.h

Konrad

>  	DPU_REG_WRITE(c, LM_BLEND0_CONST_ALPHA + stage_off, const_alpha);
>  	DPU_REG_WRITE(c, LM_BLEND0_OP + stage_off, blend_op);
>  }
> @@ -160,7 +161,8 @@ dpu_hw_lm_setup_blend_config_combined_alpha_v12(struct dpu_hw_mixer *ctx,
>  	if (WARN_ON(stage_off < 0))
>  		return;
>  
> -	const_alpha = (bg_alpha & 0x3ff) | ((fg_alpha & 0x3ff) << 16);
> +	const_alpha = ((bg_alpha >> 6) & 0x3ff) |
> +		(((fg_alpha >> 6) & 0x3ff) << 16);
>  	DPU_REG_WRITE(c, LM_BLEND0_CONST_ALPHA_V12 + stage_off, const_alpha);
>  	DPU_REG_WRITE(c, LM_BLEND0_OP + stage_off, blend_op);
>  }
> @@ -178,8 +180,8 @@ static void dpu_hw_lm_setup_blend_config(struct dpu_hw_mixer *ctx,
>  	if (WARN_ON(stage_off < 0))
>  		return;
>  
> -	DPU_REG_WRITE(c, LM_BLEND0_FG_ALPHA + stage_off, fg_alpha);
> -	DPU_REG_WRITE(c, LM_BLEND0_BG_ALPHA + stage_off, bg_alpha);
> +	DPU_REG_WRITE(c, LM_BLEND0_FG_ALPHA + stage_off, fg_alpha >> 8);
> +	DPU_REG_WRITE(c, LM_BLEND0_BG_ALPHA + stage_off, bg_alpha >> 8);
>  	DPU_REG_WRITE(c, LM_BLEND0_OP + stage_off, blend_op);
>  }
>  
>