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Message-Id: <20251118-b4-ddr-bindings-v9-0-a033ac5144da@gmail.com>
Date: Tue, 18 Nov 2025 16:07:56 +0100
From: Clément Le Goffic <legoffic.clement@...il.com>
To: Krzysztof Kozlowski <krzk@...nel.org>, Rob Herring <robh@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Julius Werner <jwerner@...omium.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Maxime Coquelin <mcoquelin.stm32@...il.com>,
Alexandre Torgue <alexandre.torgue@...s.st.com>
Cc: linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
linux-stm32@...md-mailman.stormreply.com,
linux-arm-kernel@...ts.infradead.org,
Clément Le Goffic <legoffic.clement@...il.com>,
Clément Le Goffic <clement.legoffic@...s.st.com>,
Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Subject: [PATCH v9 0/7] Add DDR4 memory-controller bindings and factorise
LPDDR and DDR bindings
Introduce DDR4 bindings, which is the first DDR type to be added.
As the DDR and LPDDR use the same properties, factorise them in a
sdram-props bindings file and rename lpddr-channel into sdram-channel.
Changes in v9:
- In the ddr4 compatible pattern :
s/ddrX-YYYY,AAAA...,ZZ/ddrX-YYYY,AAAA...-ZZ/
The comma before the "ZZ" part has been replaced with a minus.
- Add information about how the compatible is constructed in the patch 2:
"dt-bindings: memory: introduce DDR4"
- Add Krzysztof Kozlowski's trailer on patch 1
- Link to v8: https://lore.kernel.org/r/20250930-b4-ddr-bindings-v8-0-fe4d8c015a50@gmail.com
Changes in v8:
- Globally fix typo/grammar in SDRAM props bindings:
- DDR4 bindings compatible description:
- s/lpddrX,YY,ZZZZ/lpddrX-YY,ZZZZ/
- s/in lower case/lowercase/
- s/statis/static/
- s/~/-/
- Add an "s" where a plural form is used (e.g. registers) in the DDR4
binding revision-id description
- Fix the number of chars that an SPD can contain in the part number
field.
- Link to v7: https://lore.kernel.org/r/20250922-b4-ddr-bindings-v7-0-b3dd20e54db6@gmail.com
The v7 is a subset of the v6 and other prior versions, split to simplify
the review and merging process.
Changes in v7:
- None
- Link to v6: https://lore.kernel.org/all/20250909-b4-ddrperfm-upstream-v6-5-ce082cc801b5@gmail.com/
Signed-off-by: Clément Le Goffic <legoffic.clement@...il.com>
---
Clément Le Goffic (7):
dt-bindings: memory: factorise LPDDR props into SDRAM props
dt-bindings: memory: introduce DDR4
dt-bindings: memory: factorise LPDDR channel binding into SDRAM channel
dt-binding: memory: add DDR4 channel compatible
dt-bindings: memory: SDRAM channel: standardise node name
arm64: dts: st: add LPDDR channel to stm32mp257f-dk board
arm64: dts: st: add DDR channel to stm32mp257f-ev1 board
.../memory-controllers/ddr/jedec,ddr4.yaml | 34 ++++++++
.../memory-controllers/ddr/jedec,lpddr-props.yaml | 74 -----------------
.../memory-controllers/ddr/jedec,lpddr2.yaml | 2 +-
.../memory-controllers/ddr/jedec,lpddr3.yaml | 2 +-
.../memory-controllers/ddr/jedec,lpddr4.yaml | 2 +-
.../memory-controllers/ddr/jedec,lpddr5.yaml | 2 +-
...lpddr-channel.yaml => jedec,sdram-channel.yaml} | 40 ++++++---
.../memory-controllers/ddr/jedec,sdram-props.yaml | 94 ++++++++++++++++++++++
arch/arm64/boot/dts/st/stm32mp257f-dk.dts | 7 ++
arch/arm64/boot/dts/st/stm32mp257f-ev1.dts | 7 ++
10 files changed, 173 insertions(+), 91 deletions(-)
---
base-commit: e7c375b181600caf135cfd03eadbc45eb530f2cb
change-id: 20250922-b4-ddr-bindings-7161e3e0af56
Best regards,
--
Clément Le Goffic <legoffic.clement@...il.com>
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