linux-kernel - Re: [PATCH v6 0/3] Add support for Glymur PCIe Gen5 x4

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Message-ID: <aRyoo2Ve_hjgc84M@vaman>
Date: Tue, 18 Nov 2025 22:40:59 +0530
From: Vinod Koul <vkoul@...nel.org>
To: Qiang Yu <qiang.yu@....qualcomm.com>
Cc: Kishon Vijay Abraham I <kishon@...nel.org>,
	Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>, linux-arm-msm@...r.kernel.org,
	linux-phy@...ts.infradead.org, devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	Prudhvi Yarlagadda <quic_pyarlaga@...cinc.com>,
	Wenbin Yao <wenbin.yao@....qualcomm.com>,
	Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>,
	Manivannan Sadhasivam <mani@...nel.org>
Subject: Re: [PATCH v6 0/3] Add support for Glymur PCIe Gen5 x4

On 03-11-25, 23:56, Qiang Yu wrote:
> Glymur is the next generation compute SoC of Qualcomm. This patch series
> aims to add support for the fourth, fifth and sixth PCIe instance on it.
> The fifth PCIe instance on Glymur has a Gen5 4-lane PHY and fourth, fifth
> and sixth PCIe instance have a Gen5 2-lane PHY.
> 
> The device tree changes and whatever driver patches that are not part of
> this patch series will be posted separately after official announcement of
> the SOC.

Please rebase on phy/next, this does not apply for me

-- 
~Vinod