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Message-ID: <37d0f89f-69be-45a7-90fa-347d6a3800bf@oss.qualcomm.com>
Date: Tue, 18 Nov 2025 10:25:15 -0800
From: Vijay Kumar Tumati <vijay.tumati@....qualcomm.com>
To: Bryan O'Donoghue <bryan.odonoghue@...aro.org>,
        Hangxiang Ma <hangxiang.ma@....qualcomm.com>,
        Loic Poulain <loic.poulain@....qualcomm.com>,
        Robert Foss
 <rfoss@...nel.org>, Andi Shyti <andi.shyti@...nel.org>,
        Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley <conor+dt@...nel.org>, Todor Tomov <todor.too@...il.com>,
        Vladimir Zapolskiy <vladimir.zapolskiy@...aro.org>,
        Mauro Carvalho Chehab <mchehab@...nel.org>
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-media@...r.kernel.org,
        aiqun.yu@....qualcomm.com, tingwei.zhang@....qualcomm.com,
        trilok.soni@....qualcomm.com, yijie.yang@....qualcomm.com,
        Jingyi Wang <jingyi.wang@....qualcomm.com>,
        Atiya Kailany <atiya.kailany@....qualcomm.com>
Subject: Re: [PATCH v6 1/5] media: dt-bindings: Add CAMSS device for Kaanapali


On 11/18/2025 7:00 AM, Bryan O'Donoghue wrote:
> On 14/11/2025 03:29, Hangxiang Ma wrote:
>> +                  <0x0 0x0900e000 0x0 0x1000>,
>
> Why aren't you starting @ 0x0900e000 ? seems to be omitting some of 
> the registers in the ICP block. Should start at +0xd000 not +0xe000 ?
>
>> +                  <0x0 0x0902e000 0x0 0x1000>,
>
> Same here.
Hi Bryan, HLOS does not have access to those registers. They are 
configured by the Hyp.
>
>> +                  <0x0 0x090d7000 0x0 0x20000>,
>> +                  <0x0 0x0904e000 0x0 0x1000>,
>> +                  <0x0 0x0904d000 0x0 0x1000>,
>> +                  <0x0 0x09057000 0x0 0x40000>,
>> +                  <0x0 0x09147000 0x0 0x580>,
>> +                  <0x0 0x09148000 0x0 0x580>,
>> +                  <0x0 0x09149000 0x0 0x580>,
>> +                  <0x0 0x0914a000 0x0 0x580>,
>> +                  <0x0 0x0914b000 0x0 0x580>,
>> +                  <0x0 0x093fd000 0x0 0x400>,
>> +                  <0x0 0x093fe000 0x0 0x400>,
>> +                  <0x0 0x093ff000 0x0 0x400>;
>
> The rest of these registers start at the defined block addresses in 
> the documentation.
>
> Unless there's a very good reason for that, please amend.
Sorry, is there an additional concern here or you were just pointing 
these as reference for the above?
>
> ---
> bod
>
Thanks,

Vijay.


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