linux-kernel - RE: [PATCH v2 2/2] spi: add driver for NXP XSPI controller

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Message-ID:
 <DU0PR04MB9496206DEF7F3C00BA2C493D90D6A@DU0PR04MB9496.eurprd04.prod.outlook.com>
Date: Tue, 18 Nov 2025 02:29:22 +0000
From: Bough Chen <haibo.chen@....com>
To: Mark Brown <broonie@...nel.org>
CC: Han Xu <han.xu@....com>, Rob Herring <robh@...nel.org>, Krzysztof
 Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, Shawn Guo
	<shawnguo@...nel.org>, Sascha Hauer <s.hauer@...gutronix.de>, Pengutronix
 Kernel Team <kernel@...gutronix.de>, Fabio Estevam <festevam@...il.com>,
	"linux-spi@...r.kernel.org" <linux-spi@...r.kernel.org>,
	"imx@...ts.linux.dev" <imx@...ts.linux.dev>, "devicetree@...r.kernel.org"
	<devicetree@...r.kernel.org>, "linux-kernel@...r.kernel.org"
	<linux-kernel@...r.kernel.org>, "linux-arm-kernel@...ts.infradead.org"
	<linux-arm-kernel@...ts.infradead.org>
Subject: RE: [PATCH v2 2/2] spi: add driver for NXP XSPI controller

> -----Original Message-----
> From: Mark Brown <broonie@...nel.org>
> Sent: 2025年11月18日 1:26
> To: Bough Chen <haibo.chen@....com>
> Cc: Han Xu <han.xu@....com>; Rob Herring <robh@...nel.org>; Krzysztof
> Kozlowski <krzk+dt@...nel.org>; Conor Dooley <conor+dt@...nel.org>; Shawn
> Guo <shawnguo@...nel.org>; Sascha Hauer <s.hauer@...gutronix.de>;
> Pengutronix Kernel Team <kernel@...gutronix.de>; Fabio Estevam
> <festevam@...il.com>; linux-spi@...r.kernel.org; imx@...ts.linux.dev;
> devicetree@...r.kernel.org; linux-kernel@...r.kernel.org;
> linux-arm-kernel@...ts.infradead.org
> Subject: Re: [PATCH v2 2/2] spi: add driver for NXP XSPI controller
> 
> On Mon, Nov 17, 2025 at 07:04:25PM +0800, Haibo Chen wrote:
> 
> > Add driver support for NXP XSPI controller.
> >
> > XSPI is a flexsible SPI host controller which supports up to
> > 2 external devices (2 CS). It support Single/Dual/Quad/Octal mode data
> > transfer.
> 
> This looks pretty good, a couple of small points:
> 
> > +static irqreturn_t nxp_xspi_irq_handler(int irq, void *dev_id) {
> > +	struct nxp_xspi *xspi = dev_id;
> > +	u32 reg;
> > +
> > +	/* Clear interrupt */
> > +	reg = readl(xspi->iobase + XSPI_FR);
> > +	writel(XSPI_FR_TFF, xspi->iobase + XSPI_FR);
> > +
> > +	if (reg & XSPI_FR_TFF)
> > +		complete(&xspi->c);
> > +
> > +	return IRQ_HANDLED;
> > +}
> 
> This just unconditionally acks interrupts without checking if there was actually
> anything there - that means that if some design shares the interrupt or it
> spuriously fires then the interrupt core won't handle things properly.  The
> driver should really return IRQ_NONE if there is no interrupt pending.

Yes, reasonable, will add in next version.

> 
> > +		WARN_ON(!(reg & XSPI_FR_TBFF));
> > +		if (i == ALIGN_DOWN(op->data.nbytes, 4)) {
> > +			/* Use 0xFF for extra bytes */
> > +			left = 0xFFFFFFFF;
> > +			/* The last 1 to 3 bytes */
> > +			memcpy((u8 *)&left, buf + i, op->data.nbytes - i);
> > +			writel(left, base + XSPI_TBDR);
> > +		} else
> > +			writel(*(u32 *)(buf + i), base + XSPI_TBDR);
> 
> If one side of the if has { } they both should.

Ok, will fix in next version.

Regards
Haibo Chen